Dr Udayan Ganguly
Assistant Professor
| Department of Electrical Engineering
Indian Institute of Technology, Bombay
Maharashtra
Expertise:
Electrical and Electronic Engineering
252
Publications
0
Projects
2508
Scopus Citations
2284
CrossRef
16 Years 8 Months Total Experience
Scopus
2,508
Citations
24
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CrossRef
2,284
Citations
22
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Personal Details
Doctor of Philosophy
2006
N/A
Assistant Professor
Jan 2010 – Present
Indian Institute of Technology, Bombay
| Department of Electrical Engineering
Engineering and Technology
Scholarly Work
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PROCÉDÉ DE FABRICATION DE GERMANIUM/SILICIUM SUR ISOLANT DANS UN SYSTÈME DE PULVÉRISATION RADIOFRÉQUENCE | METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
IN
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Patent No. :
WO2019244174A3
Filed :
21-06-2019
Published :
26-03-2020
Published
PROCÉDÉ DE FABRICATION D'UN OSCILLATEUR NEURONAL COMPRENANT UN DISPOSITIF D'ISOLATION THERMIQUE | METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
IN
-
Patent No. :
WO2019229770A3
Filed :
28-05-2019
Published :
30-07-2020
Published
SYSTÈME ET PROCÉDÉ DE GÉNÉRATION DE CHAÎNE DE BITS ALÉATOIRES DANS UN CIRCUIT INTÉGRÉ | SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
IN
-
Patent No. :
WO2019180743A3
Filed :
20-03-2019
Published :
14-11-2019
Published
METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201821023394A
Filed :
22-06-2018
Published :
27-12-2019
Published
AN ULTRA ENERGY EFFICIENT NEURON ENABLED BY TUNNELING IN SUB-THRESHOLD REGIME ON A HIGHLY MANUFACTURABLE 32 NM SOI CMOS TECHNOLOGY
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201821023397A
Filed :
22-06-2018
Published :
27-12-2019
Published
METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201821019896A
Filed :
28-05-2018
Published :
29-11-2019
Published
SPIKING NEURAL NETWORK (SNN) FACILITATING READ AND WRITE OPERATIONS AND A METHOD THEREOF
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201821015672A
Filed :
25-04-2018
Published :
01-11-2019
Published
SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201821010427A
Filed :
21-03-2018
Published :
27-09-2019
Published
LEAKY INTEGRATE & FIRE (LIF) NEURON BASED ON FLOATING BODY EFFECT
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201721027169A
Filed :
31-07-2017
Published :
01-02-2019
Published
METHOD AND SYSTEM FOR ONE TIME PROGRAMMABLE MEMORY FOR ENCRYPTION AND RECONFIGURABLE CIRCUITS
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201621031483A
Filed :
15-09-2016
Published :
06-09-2019
Published
SELECTOR-LESS RESISTANCE RANDOM ACCESS MEMORY (RRAM)
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201503866I3
Filed :
12-10-2015
Published :
14-04-2017
Published
BULK PLANAR CAPACITOR-LESS DYNAMIC RANDOM ACCESS MEMORY (DRAM)
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201501976I3
Filed :
19-05-2015
Published :
24-03-2017
Published
AN ELECTRONIC DEVICE THAT MIMICS A BIOLOGICAL NEURON AND ITS FABRICATION
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
IN
-
Patent No. :
IN338684B
Filed :
14-04-2015
Published :
19-06-2020
Published
AN AMBIPOLAR TWO TERMINAL SELECTION DEVICE.
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY | INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201302134I3
Filed :
24-06-2013
Published :
05-06-2015
Published
LOW RESISTANCE METAL-INTERFACIAL LAYERSEMICONDUCTOR (MIS) CONTACT AND METHOD OF FORMING THEREOF
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
IN
-
Patent No. :
IN341586B
Filed :
25-02-2013
Published :
17-07-2020
Published
TRANSISTOR DESIGN FOR IMPROVED PERFORMANCE AND VARIABILITY AND METHOD OF FABRICATION THEREOF
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201201750I3
Filed :
18-06-2012
Published :
21-02-2014
Published
DISPOSITIF DE SÉLECTION POUR MÉMOIRE RRAM BIPOLAIRE | SELECTOR DEVICE FOR BIPOLAR RRAM
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
IN | GANGULY Udayan
IN | LODHA Saurabh
IN | BAFNA Pranil Yogendra
IN | KARKARE Prateek
IN | KUMBHARE Pankaj S.
IN | SRINIVASAN V.S. Senthil
IN
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Patent No. :
WO2013046217A3
Filed :
12-06-2012
Published :
04-07-2013
Published
N-TYPE METAL-INTERFACIAL SEMICONDUCTOR LAYER-SEMICONDUCTOR (MISS)
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN201201698I3
Filed :
11-06-2012
Published :
14-02-2014
Published
SELECTOR DEVICE FOR BIPOLAR RRAM
INDIAN INSTITUTE OF TECHNOLOGY BOMBAY
-
Patent No. :
IN323295B
Filed :
13-06-2011
Published :
25-10-2019
Published
Scholarly Publications
Enhanced calibration treatment analysis for optimizing fracture performance: Validation and field examples
Integration of fullerenes and carbon nanotubes with aggressively scaled CMOS gate stacks
Experimental observation of non-volatile charge injection and molecular redox in fullerenes C 60 and C 70 in an EEPROM-type device
Scopus: 1
3-D Electrostatic Modeling and Impact of High-K Control Oxide in Metal Nanocrystal Memory
Process integration of composite high-k tunneling dielectric for nanocrystal based carbon nanotube memory
Effects of metal nanocrystals and traps in tunneling rate measurements in metal nanocrystal based carbon nanotube memory
Modeling Charge Control in Heterostructure Nanoscale Transistors
10.1007/978-3-319-03002-9_74
Crossref: 2
Snn model for highly energy and area efficient on-chip classification
Showing 1 to 8 of 252 publications