Dr Satvir Singh Deswal
Professor
| Department of Electrical and Electronics Engineering
Maharaja Agrasen Institute of Technology
Delhi
Expertise:
Electrical and Electronic Engineering
51
Publications
2
Projects
925
Scopus Citations
806
CrossRef
28 Years 1 Month Total Experience
Scopus
925
Citations
18
h-index
CrossRef
806
Citations
17
h-index
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Professional Recognition
Bharat Seva Ratna Award
2016
Indraprastha Sanjeevni
SWABHIMAN AWARDS-BEST EDUCATION MENTOR
2021
DCWSCJA
BEST TEACHER
2008
MAHARAJA AGRASEN TECHNICAL EDUCATION SOCIETY
2ND BEST SPORTS PERSON OF B.TECH BATCH 1994-1998
1998
REGIONAL ENGINEERING COLLEGE, KURUKSHETRA, HARYANA
Community & Membership
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International Association of Engineers
Member No. 153023IACSIT
Member No. 80331492AMIE
ASSOCIATE Membership No. AM119148-1Universal Association of Computer and Electronics Engineers
Senior Member No. SNM1010003353Personal Details
Doctor of Philosophy
2012
N/A
Master of Technology
2005
N/A
Bachelor of Technology
1998
N/A
Professor
Oct 2006 – Present
Maharaja Agrasen Institute of Technology
| Department of Electrical and Electronics Engineering
Professor
Oct 2005 – Jan 2026
Maharaja Agrasen Institute of Technology
Head of the Department
Aug 1998 – Sep 2005
Unknown Organization
Engineering and Technology
Scholarly Work
Analytical Modelling and TCAD Analysis of Nanoscale MOSFET Devices
CompletedPhysical Modeling of Gallium Nitride High Electron Mobility Transistor (GaN-HEMT) With Field Plate Structure for High Power, High Frequency and Highly Efficient Power Amplifiers
CompletedNo Data Found
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Scholarly Publications
Analytical modelling and sensitivity analysis of Gallium Nitride-Gate Material and, dielectric engineered- Schottky nano-wire fet(GaN-GME-DE-SNW-fet) based label-free biosensor
Polarization dependent charge control model for microwave performance assessment of AlGaN/GaN/AlGaN double heterostructure HEMTs
Silicon Carbide based DSG MOSFET for High Power, High Speed and High Frequency Applications
RF and linearity parameters analysis of 20 nm gate-all-around gate-stacked junction-less accumulation mode MOSFET for low power circuit applications
Extraction of non-quasi-static model parameters for cylindrical gate-stacked junction-less accumulation mode MOSFET and its implementation as RF filters for circuit applications
Impact of Interface Trap Charges on Silicon Carbide (4H-SiC) Based Gate – Stack, Dual Metal, Surrounding Gate, FET (4H-SiC- GSDM-SGFET) for Analog and Noise Performance Analysis for 5 G/LTE Applications
Open AccessDesign of Low Power Analog/RF Signal Processing Circuits Using 22 nm Silicon-on-Insulator Schottky Barrier Nano-Wire MOSFET
Ride-through topology for adjustable speed drives (ASD's) during power system faults
Showing 1 to 8 of 51 publications