Jagadesh Kumar Mamidala
VIDWAN ID: 43033

Prof Jagadesh Kumar Mamidala

Male Doctor of Philosophy
Chairman
University Grant Commission (2022)
Delhi
Expertise: Electrical and Electronic Engineering
284 Publications
0 Projects
2410 Scopus Citations
7634 CrossRef
27 Years 1 Month Total Experience
Publications
284 Total
Articles
234
Books
2
Chapters
1
Proceedings
47
Activity

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Scopus Scopus
2,410 Citations
25 h-index
CrossRef CrossRef
7,634 Citations
44 h-index
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Personal Details

Doctor of Philosophy
Indian Maritime University
Chairman
Jan 2022 – —
University Grant Commission
Professor (HAG)
Jun 2019 – Dec 1995
Indian Institute of Technology, Delhi | Department of Electrical Engineering
Vice Chancellor
Feb 2016 – Apr 2022
Jawaharlal Nehru University
Professor
Dec 1995 – Jul 2019
Indian Institute of Technology, Delhi | Department of Electrical Engineering
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

Enhanced current gain in SiC power BJTs using surface accumulation layer transistor (SALTran) concept

Conference Paper
Year: 2004.
Authors: Kumar, M.J.; Parihar, V.

Special issue on ICT - The road ahead - Guest editorial

Journal Article
IETE Technical Review. Year: 2005.
Authors: Kumar, M. J.

The simulation of a new asymmetrical double-gate poly-Si TFT with modified channel conduction mechanism for highly reduced OFF-state leakage current

Journal Article
IEEE Transactions on Device and Materials Reliability. Year: 2005. Volume: 5 , Issue: 4 , Pages: 675-682 .
Authors: Orouji, A.A.; Jagadesh Kumar, M.

Two-dimensional analytical threshold voltage model of nanoscale fully depleted SOI MOSFET with electrically induced S/D extensions

Journal Article
IEEE Transactions on Electron Devices. Year: 2005. Volume: 52 , Issue: 7 , Pages: 1568-1575 .
Authors: Kumar, M.J.; Orouji, A.A.

A new Surface Accumulation Layer Transistor (SALTran) concept for current gain enhancement in bipolar transistors

Conference Paper
Year: 2004. Pages: 827-831 .
Authors: M. Jagadesh Kumar; V. Parihar

Realizing high-voltage thin film lateral bipolar transistors on SOI with a collector-tub

Journal Article
Microelectronics International. Year: 2005. Volume: 22 , Issue: 1 , Pages: 3-9 .
Authors: Roy, S.D.; Kumar, M.J.

Realizing high-voltage thin film lateral bipolar transistors on SOI with a collector-tub

Journal Article
Authors: Roy, S. D.; Kumar, M. J.

ShOC rectifier: A new metal-semiconductor device with excellent forward and reverse characteristics

Journal Article
IEEE Transactions on Electron Devices. Year: 2005. Volume: 52 , Issue: 1 , Pages: 130-132 .
Authors: Kumar, M.J.
Showing 57 to 64 of 284 publications