Ministry of Education
Shashidhara H R
VIDWAN ID: 260613

Dr Shashidhara H R

Male Doctor of Philosophy
Associate Professor | Department of Electronics and Communication Engineering
National Institute of Engineering, MYSORE (2020 - 2008)
Karnataka
Expertise: Electrical and Electronic Engineering
Scopus 56126839300
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21 Publications
0 Projects
59 Scopus Citations
46 CrossRef
15 Years 9 Months Total Experience
Publications
21 Total
Articles
8
Chapters
2
Proceedings
11
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Scopus Scopus
59 Citations
5 h-index
CrossRef CrossRef
46 Citations
4 h-index
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IEEE
Senior
Jan 2019
IETE
Life
Jan 2012

Personal Details

Doctor of Philosophy
2018
Guru Nanak Khalsa College, Yamuna Nagar
Master of Technology
2008
Guru Nanak Khalsa College, Yamuna Nagar
Associate Professor
Dec 2020 – Jul 2008
National Institute of Engineering, MYSORE | Department of Electronics and Communication Engineering
Assistant Professor
Aug 2010 – Oct 2018
J S S Academy of Technical Education, BANGALORE | Department of Electronics and Communication Engineering
Senior Lecturer
Jul 2008 – Jul 2010
Jain University
Lecturer
Jul 2004 – Nov 2006
Coorg Institute of Technology, PONNAMPET
Lecturer
Jul 2001 – Jun 2004
Vidya Vardhaka College of Engineering, MYSORE
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Publications

A theoretical proposition to characterize speed based performance of Bulk transaction in Universal Serial Bus 3.0 SuperSpeed protocol

Conference Paper
Year: 2017. Pages: 49-54 .
Authors: Adithya Rangan C.K.; Vikas Kulkarni; Shashidhara H. R.
DOI 10.1109/ICATCCT.2016.7911964 Scopus Scopus: 4

A novel approach to circular edge detection for Iris image segmentation

Conference Paper
Year: 2014. Pages: 316-320 .
Authors: H.R. Shashidhara; A.R. Aswath
DOI 10.1109/ICSIP.2014.56 Crossref Crossref: 9 Scopus Scopus: 11

Test vector Generation using different logic regression method

Conference Paper
Year: 2017. Pages: 736-742 .
Authors: Shashidhara H. R.
DOI 10.1109/ICATCCT.2016.7912097

A Generic Algorithm for Speed Based Performance Estimation and Computation for Universal Serial Bus 3.0 SuperSpeed Bulk Transaction

Conference Paper
Year: 2017. Pages: 90-95 .
Authors: C.K. Adithya Rangan; Vikas Kulkarni; K. Aravinda Holla; H.R. Shashidhara
DOI 10.1109/ICRAECT.2017.11 Crossref Crossref: 1 Scopus Scopus: 4

Deadlock recovery for noc using modified encoding scheme

Book Chapter
Year: 2018. Volume: 709 , Pages: 351-359 .
Authors: H. R. Shashidhara; T. R. Prateek kumar
DOI 10.1007/978-981-10-8633-5_35

Performance Analysis of YOLO Models for Beetroot Crop Disease Detection

Conference Paper
Year: 2025. Volume: 2 , Pages: 15548-15557 .

Design and implementation of argo ni-noc micro-architecture for mpsoc using gals architecture

Book Chapter
Year: 2020. Volume: 569 , Pages: 451-463 .
Authors: H. R. Shashidhara; S. Nagendra Prasad; B. L. Prabhudeva; Subhash S. Kulkarni
DOI 10.1007/978-981-13-8942-9_37 Crossref Crossref: 3 Scopus Scopus: 2

Comparison of Memristor Mathematical Models

Conference Paper
Year: 2022. Pages: 61-65 .
Authors: N Sanjana; M S Deepthi; H R Shashidhara; Yajunath Kaliyath
DOI 10.1109/DISCOVER55800.2022.9974669 Crossref Crossref: 3 Scopus Scopus: 2
Showing 1 to 8 of 21 publications