Vidwan-ID : 167842

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Academic Identity

Orcid Id 0000-0001-8423-4071
Scopus Id 24829255600
Researcher Id AAZ-1107-2020
Google Scholar Id gYU6nH8AAAAJ

Profile Links

Score criteria

Criteria	Point
Personal Details	1
Expertise Details	1
Experience Details	1
Qualification Details	1
Employee ID	0.2
Orcid ID	0.2
Researcher ID	0.2
Scopus ID	0.2
Google Scholar ID	0.2
Honours <=3< /td>	0.3
Honours >3	0.5
Project worth less than Rs.5,00,000/-	0.2
Project worth more than Rs.5,00,000/-	0.5
Membership in professional Bodies < 5	0.5
Membership in professional bodies >=5	1
No of publications <=15	1
No of publications between 15-45	2
No of publications >45	3

Vidwan Score 6.8

9 Articles

2 Books

Dr Aswatha A R

Dean

Dayananda Sagar College of Engineering

Publications

9

Journal Articles
2

Book
15

Conference
Proceedings
3
22

Citations / H-Index

103 Citations

6 h-index

47 Citations

Google Scholar

Co-author Network

Expertise

Electrical and Electronic Engineering

VLSI Circuit Design and Embedded systems

Personal Information

Dr Aswatha A R

Male

Department Of Electronics And Communication Engineering

, Karnataka, India - 560078

Experience

1992 - Present

Dean

Department of Electronics and Communication Engineering

Dayananda Sagar College of Engineering, Bangalore

Qualification

2010

Ph.D

Visvesvaraya Technological University, Belgaum

Doctoral Theses Guided

2024

A cross layer approach (Design) for energy efficient wireless sensor network protocols

Visvesvaraya Technological University,Mahesh.D

2022

FPGA based SOC – NOC smart router

Visvesvaraya Technological University,Kruthika H K

2021

Developing Compact Device Model for low power Downscaled MOSFETS

Visvesvaraya Technological University,S.Balaji Ramakrishna

2024

A cross layer approach (Design) for energy efficient wireless sensor network protocols

Visvesvaraya Technological University,Mahesh.D

2022

FPGA based SOC – NOC smart router

Visvesvaraya Technological University,Kruthika H K

2021

Developing Compact Device Model for low power Downscaled MOSFETS

Visvesvaraya Technological University,S.Balaji Ramakrishna

2019

On-Chip Design and Verification Methodology for Multimodal biometric application

Visvesvaraya Technological University,Shashidhara.H.R

2019

ASIC based Verification Methods for Digital Image Stegnography

Visvesvaraya Technological University,Satisha Shet

2019

Addressing challenges of system level modeling and performance optimization of embedded systems

Jain University,Murigendrayya M Hiremath

2018

Verification Methodology for complex SOC

Jain University,Mukthi.S.L

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Vidwan-ID : 167842

Academic Identity

Profile Links

Score criteria

Vidwan Score 6.8

Dr Aswatha A R

Publications

Journal Articles

Book

Conference
Proceedings

Citations / H-Index

Google Scholar

Co-author Network

Expertise

Electrical and Electronic Engineering

VLSI Circuit Design and Embedded systems

Personal Information

Dr Aswatha A R

Experience

Dean

Qualification

Ph.D

Doctoral Theses Guided

A cross layer approach (Design) for energy efficient wireless sensor network protocols

FPGA based SOC – NOC smart router

Developing Compact Device Model for low power Downscaled MOSFETS

A cross layer approach (Design) for energy efficient wireless sensor network protocols

FPGA based SOC – NOC smart router

Developing Compact Device Model for low power Downscaled MOSFETS

On-Chip Design and Verification Methodology for Multimodal biometric application

ASIC based Verification Methods for Digital Image Stegnography

Addressing challenges of system level modeling and performance optimization of embedded systems

Verification Methodology for complex SOC

Publications (26)

Contact Us

Vidwan-ID : 167842

Academic Identity

Profile Links

Score criteria

Vidwan Score 6.8

Dr Aswatha A R

Publications

Journal Articles

Book

Conference Proceedings

Citations / H-Index

Google Scholar

Co-author Network

Publications - 26 Co-author - 55

Expertise

Electrical and Electronic Engineering

VLSI Circuit Design and Embedded systems

Personal Information

Dr Aswatha A R

Experience

Dean

Qualification

Ph.D

Doctoral Theses Guided

A cross layer approach (Design) for energy efficient wireless sensor network protocols

FPGA based SOC – NOC smart router

Developing Compact Device Model for low power Downscaled MOSFETS

A cross layer approach (Design) for energy efficient wireless sensor network protocols

FPGA based SOC – NOC smart router

Developing Compact Device Model for low power Downscaled MOSFETS

On-Chip Design and Verification Methodology for Multimodal biometric application

ASIC based Verification Methods for Digital Image Stegnography

Addressing challenges of system level modeling and performance optimization of embedded systems

Verification Methodology for complex SOC

Publications (26)

Contact Us

Conference
Proceedings