Ministry of Education
Preeti Ranjan Panda
VIDWAN ID: 16656

Prof Preeti Ranjan Panda

Male Doctor of Philosophy
Professor (HAG) | Department of Computer Science and Engineering
Indian Institute of Technology, Delhi
Delhi
Expertise: Electrical and Electronic Engineering
Scopus 7005346304 Google Scholar 4Q2DOC4AAAAJ
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137 Publications
0 Projects
2138 Scopus Citations
1500 CrossRef
11 Years 7 Months Total Experience
Publications
137 Total
Articles
63
Books
1
Chapters
4
Proceedings
69
Activity

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Scopus Scopus
2,138 Citations
22 h-index
CrossRef CrossRef
1,500 Citations
18 h-index
Google Scholar Google Scholar

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Personal Details

Doctor of Philosophy
N/A
Professor (HAG)
Jul 2019 – Present
Indian Institute of Technology, Delhi | Department of Computer Science and Engineering
Professor
Feb 2015 – Jul 2019
Indian Institute of Technology, Delhi | Department of Computer Science and Engineering
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

COBRRA: COntention-aware cache Bypass with Request-Response Arbitration

Open Access
Journal Article
ACM Transactions on Embedded Computing Systems. Year: 2024. Volume: 23 , Issue: 1 .
Authors: Aritra Bagchi; Dinesh Joshi; Preeti Ranjan Panda
DOI 10.1145/3632748 Crossref Crossref: 5 Scopus Scopus: 6

3D-TemPo: Optimizing 3-D DRAM Performance under Temperature and Power Constraints

Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Year: 2024. Volume: 43 , Issue: 8 , Pages: 2263-2276 .
Authors: Shailja Pandey; Sayam Sethi; Preeti Ranjan Panda
DOI 10.1109/TCAD.2024.3367235 Crossref Crossref: 4 Scopus Scopus: 4

NOVELLA: Nonvolatile Last-Level Cache Bypass for Optimizing Off-Chip Memory Energy

Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Year: 2024. Volume: 43 , Issue: 11 , Pages: 3913-3924 .
Authors: Aritra Bagchi; Ohm Rishabh; Preeti Ranjan Panda
DOI 10.1109/TCAD.2024.3446720 Crossref Crossref: 4 Scopus Scopus: 4

CAPE: Criticality-Aware Performance and Energy Optimization Policy for NCFET-Based Caches

Journal Article
IEEE Transactions on Computers. Year: 2024. Volume: 73 , Issue: 12 , Pages: 2830-2843 .
Authors: Divya Praneetha Ravipati; Ramanuj Goel; Victor M. van Santen; Hussam Amrouch; Preeti Ranjan Panda
DOI 10.1109/TC.2024.3457734

HyDRA: Deadline and Reuse-Aware Cacheability for Hardware Accelerators

Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Year: 2026.
Authors: Ayushi Agarwal; Anannya Mathur; Preeti Ranjan Panda
DOI 10.1109/TCAD.2026.3693624 Scopus Scopus: 1

Modeling Energy and Delay for ECC-Enabled Cache Architectures

Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Year: 2026.
Authors: Dinesh Joshi; Aritra Bagchi; Ayushi Agarwal; Garima Modi; Neha Srivastava; Sourav Roy; Preeti Ranjan Panda
DOI 10.1109/TCAD.2026.3665117

Application-Aware Memory Management for IPsec on Heterogeneous SoCs

Conference Paper
Year: 2026. Volume: 744 IFIPAICT , Pages: 51-71 .
Authors: Ayushi Agarwal; Radhika Dharwadkar; Isaar Ahmad; Krishna Kumar; P. J. Joseph; Sourav Roy; Prokash Ghosh; Preeti Ranjan Panda
DOI 10.1007/978-3-032-09575-6_4

FLASH: Deadline-Aware Flexible LLC Arbitration and Scheduling for Hardware Accelerators

Journal Article
ACM Transactions on Embedded Computing Systems. Year: 2025. Volume: 24 , Issue: 6 .
Authors: Ayushi Agarwal; Pulkit Goel; P.J. Joseph; Prokash Ghosh; Sourav Roy; Preeti Ranjan Panda
DOI 10.1145/3757742 Scopus Scopus: 1
Showing 129 to 136 of 137 publications