Nagendra Krishnapura
VIDWAN ID: 61882

Dr Nagendra Krishnapura

Male Doctor of Philosophy
Associate Professor | Department of Electrical Engineering
Indian Institute of Technology, Madras
Tamil Nadu
Expertise: Electrical and Electronic Engineering
82 Publications
0 Projects
500 Scopus Citations
930 CrossRef
21 Years 3 Months Total Experience
Publications
82 Total
Articles
36
Proceedings
46
Activity

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Scopus Scopus
500 Citations
11 h-index
CrossRef CrossRef
930 Citations
15 h-index
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Personal Details

Doctor of Philosophy
2000
N/A
Associate Professor
Jun 2010 – Present
Indian Institute of Technology, Madras | Department of Electrical Engineering
Assistant Professor
Jun 2005 – Jun 2010
Indian Institute of Technology, Madras | Department of Electrical Engineering
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Wideband tunable true-time-delay architecture using a Variable order all-pass filter and its applications to Continuous-time pulse processing

University Indian Institute of Technology Madras
Year 2018
Downloads 0

LOW PHASE NOISE QUADRATURE OSCILLATORS

INDIAN INSTITUTE OF TECHNOLOGY MADRAS ( INDIAN INSTITUTE OF TECHNOLOGY MADRAS)
- Patent No. : IN201741033376A Filed : 20-09-2017
Published : 22-03-2019 Published

A METHOD OF PRODUCING A LINEAR CURRENT SIGNAL IN A BASEBAND VOLTAGE-TOCURRENT (V-I) CONVERTER

INDIAN INSTITUTE OF TECHNOLOGY MADRAS
- Patent No. : IN201402897I4 Filed : 13-06-2014
Published : 29-01-2016 Published

METHOD FOR DETERMINING DISTORTION CONTRIBUTION OF INDIVIDUAL ELEMENTS IN AN ANALOG CIRCUIT

INDIAN INST TECHNOLOGY MADRAS | INDIAN INSTITUTE OF TECHNOLOGY MADRAS
- Patent No. : IN201304325I4 Filed : 24-09-2013
Published : 28-08-2015 Published

Scholarly Publications

An Automatic LO Leakage Calibration Method for Class-AB Power Mixer Based RF Transmitters

Conference Paper
Year: 2018. Volume: 2018-May .
Authors: M. V. Praveen; Nagendra Krishnapura

Linearity- and Gain-Enhanced Wideband Transconductor Using Digitally Auto-Tuned Negative Conductance Load

Conference Paper
Year: 2018. Volume: 2018-May .
Authors: Imon Mondal; Nagendra Krishnapura

Expansion and compression of analog pulses by bandwidth scaling of continuous-time filters

Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers. Year: 2018. Volume: 65 , Issue: 9 , Pages: 2703-2714 .
Authors: Imon Mondal; Nagendra Krishnapura

Reset-free memoryless delta-sigma analog-to-digital conversion

Journal Article
IEEE Transactions on Circuits and Systems I: Regular Papers. Year: 2018. Volume: 65 , Issue: 11 , Pages: 3651-3661 .
Authors: R. S. Ashwin Kumar; Debasish Behera; Nagendra Krishnapura

On-Chip Static Phase Difference Measurement Circuit With Gain and Offset Calibration

Journal Article
IEEE Transactions on Circuits and Systems II: Express Briefs. Year: 2019. Volume: 66 , Issue: 2 , Pages: 162-166 .
Authors: Abhishek Bhat; Nagendra Krishnapura

Modeling Techniques for Faster Verification of a Time to Digital Converter System-on-Chip Design

Conference Paper
Year: 2019. Pages: 1-6 .
Authors: Chithra Chithra; Nagendra Krishnapura

Scenes from ISSCC 2019 [Conference Reports]

Open Access
Conference Paper
IEEE Solid-State Circuits Magazine. Year: 2019. Volume: 11 , Issue: 2 , Pages: 147-157 .

26.3 A 25-to-38GHz, 195dB FoMT LC QVCO in 65nm LP CMOS Using a 4-Port Dual-Mode Resonator for 5G Radios

Conference Paper
Year: 2019. Volume: 2019-February , Pages: 412-414 .
Authors: Abhishek Bhat; Nagendra Krishnapura
Showing 1 to 8 of 82 publications