Abhijit Karmakar
VIDWAN ID: 599664

Dr Abhijit Karmakar

Male Doctor of Philosophy
Chief Scientific Officer | IDRP- AIoT and Applications
Indian Institute of Technology, Jodhpur
Rajasthan
Expertise: Electrical and Electronic Engineering
71 Publications
0 Projects
517 Scopus Citations
489 CrossRef
2 Years 8 Months Total Experience
Publications
71 Total
Articles
29
Books
2
Chapters
2
Proceedings
38
Activity

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Scopus Scopus
517 Citations
12 h-index
CrossRef CrossRef
489 Citations
11 h-index
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Personal Details

Doctor of Philosophy
2007
Indian Institute of Technology, Indore
Master of Technology
1995
Indian Maritime University
Bachelor of Engineering
1993
National Institute of Cholera and Enteric Diseases
Chief Scientific Officer
Jan 2024 – Present
Indian Institute of Technology, Jodhpur | IDRP- AIoT and Applications
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

Single-Channel Speech Enhancement Using Critical-Band Rate Scale Based Improved Multi-Band Spectral Subtraction

Journal Article
Year: 2013.

A perceptually motivated stationary wavelet packet filter-bank utilizing improved spectral over-subtraction algorithm for enhancing speech in non-stationary environments

Conference Paper
Year: 2012.
Authors: Navneet Upadhyay; Abhijit Karmakar

Single channel speech enhancement utilizing iterative processing of multi-band spectral subtraction algorithm

Conference Paper
Year: 2012.
Authors: Navneet Upadhyay; Abhijit Karmakar

An auditory perception based improved multi-band spectral subtraction algorithm for enhancement of speech degraded by non-stationary noises

Conference Paper
Year: 2012.
Authors: Navneet Upadhyay; Abhijit Karmakar

Evolution of architectural concepts and design methods of microprocessors

Conference Paper
Year: 1998. Pages: 312-317 .

Efficient Closely-Coupled Integration of AES Coprocessor with LEON3 Processor

Book Chapter
Year: 2019. Pages: 345-356 .
Authors: Rajul Bansal; Abhijit Karmakar

Efficient closely-coupled integration of AES coprocessor with LEON3 processor

Conference Paper
Year: 2019.

A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations

Conference Paper
Year: 2018.
Showing 1 to 8 of 71 publications