Apangshu Das
VIDWAN ID: 59654

Dr Apangshu Das

Male Master of Technology
Assistant Professor | Department of Electronics and Communication Engineering
National Institute of Technology, Agartala
Tripura
Expertise: Electrical and Electronic Engineering
15 Publications
0 Projects
104 Scopus Citations
50 CrossRef
14 Years 10 Months Total Experience
Publications
15 Total
Articles
10
Chapters
1
Proceedings
4
Activity

No publication activity to display.

Scopus Scopus
104 Citations
8 h-index
CrossRef CrossRef
50 Citations
5 h-index
Google Scholar Google Scholar

Loading Scholar statistics...

Professional Recognition

No Data Found

There is currently nothing to display here.

Community & Membership

No Data Found

There is currently nothing to display here.

International Association of Engineers (IAENG)
Life Time
Jan 2013

Personal Details

Master of Technology
2012
National Institute of Technology, Jamshedpur
Assistant Professor
Aug 2012 – Present
National Institute of Technology, Agartala | Department of Electronics and Communication Engineering
Lecturer
Jul 2009 – Mar 2010
Unknown Organization
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Scholarly Publications

Low power design of 16-bit synchronous counter by introducing effective clock monitoring circuits

Journal Article
Year: 2023. Volume: 45 , Issue: 4 , Pages: 464-469 .

An elitist area-power density trade-off in VLSI floorplan using genetic algorithm

Conference Paper
Year: 2012. Pages: 729-732 .
Authors: Das, A.; Choudhury, S.R.; Kumar, B.K.; Pradhan, S.N.

Thermal aware output polarity selection of programmable logic arrays

Conference Paper
Year: 2015. Pages: 68-71 .
Authors: Das, A.; Pradhan, S.N.

Thermal aware FPRM based AND-XOR network synthesis of logic circuits

Conference Paper
Year: 2015. Pages: 497-502 .
Authors: Das, A.; Pradhan, S.N.

Shared Reed-Muller Decision Diagram Based Thermal-Aware AND-XOR Decomposition of Logic Circuits

Open Access
Journal Article
Year: 2016. Volume: 2016 , Pages: 1-14 .
Authors: Apangshu Das; Sambhu Nath Pradhan

Area-power-temperature aware AND-XOR network synthesis based on Shared Mixed Polarity Reed-Muller expansion

Open Access
Journal Article
International Journal of Intelligent Systems and Applications. Year: 2018. Volume: 10 , Issue: 12 , Pages: 35-46 .
Authors: Das, A.; Pradhan, S.N.

Area, power and temperature optimization during binary decision diagram based circuit synthesis

Conference Paper
Year: 2017. Pages: 778-782 .
Authors: Das, A.; Debnath, A.; Pradhan, S.N.

Thermal-aware output polarity selection based on and-inverter graph manipulation

Journal Article
Recent Advances in Electrical & Electronic Engineering. Year: 2019. Volume: 12 , Issue: 1 , Pages: 30-39 .
Authors: Das, A.; Pradhan, S.N.
Showing 1 to 8 of 15 publications