Ministry of Education
Sagar Kallepelli
VIDWAN ID: 427495

Dr Sagar Kallepelli

Male Doctor of Philosophy
Assistant Professor | Department of Electrical and Communication Engineering
SR University
Telangana
Expertise: Nanoscience and Nanotechnology
ORCID 0000-0001-9875-924X Scopus 57435474800 ResearcherID JDV-9003-2023 Google Scholar KF2WfQkAAAAJ
View older version My Dashboard
11 Publications
0 Projects
64 Scopus Citations
65 CrossRef
8 Years 3 Months Total Experience
Publications
11 Total
Articles
6
Proceedings
5
Activity

No publication activity to display.

Scopus Scopus
64 Citations
5 h-index
CrossRef CrossRef
65 Citations
4 h-index
Google Scholar Google Scholar

Loading Scholar statistics...

Professional Recognition

junior reserach Fellowship
2017
MHRD
University Rank Certificate
2013
Kakatiya University
National Eligibility test for Assistant Professor
2015
University Grant Commission
Certificate of Merit
2013
KITS Warangal
National Eligibility test for Assistant Professor
2016
University Grant Commission

Community & Membership

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Personal Details

Doctor of Philosophy
2023
University of Delhi
Master of Technology
2013
M K P (P G) College
Bachelor of Technology
2010
SABAR INSTITUTE OF TECH. FOR GIRLS, TAJPUR, SABARKANTHA 066
Higher Secondary Certificate (Class 12)
2006
N/A
Secondary School Examination (Class 10)
2004
N/A
Assistant Professor
May 2023 – Present
SR University | Department of Electrical and Communication Engineering
Assistant Professor
May 2023 – Oct 2023
SR University
Assistant Professor
Aug 2017 – Oct 2018
Nalla Narasimha Reddy Education Society Group of Institutions
Assistant Professor
Dec 2013 – Jul 2017
Warangal Institute of Technology & Science, Oorugonda (V), Athmakur (M), Warangal
Engineering and Technology
Nanoscience and Nanotechnology

Related Profiles

Scholarly Work

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

No Data Found

There is currently nothing to display here.

Scholarly Publications

Optimization of Sidewall Spacer Engineering at Sub-5 nm Technology Node For JL-Nanowire FET: Digital/Analog/RF/Circuit Perspective

Journal Article
ECS Journal of Solid State Science and Technology. Year: 2024. Volume: 13 , Issue: 1 .
Authors: Chandana Anguru; Vamsi Krishna Aryasomayajula; Venkata Ramakrishna Kotha; Sresta Valasa; Sunitha Bhukya; Narendar Vadthiya; V. Bheemudu; Sagar Kallepelli; Satish Maheshwaram; Praveen Kumar Mudidhe
DOI 10.1149/2162-8777/ad15a8 Crossref Crossref: 15 Scopus Scopus: 16

Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes

Journal Article
Year: 2023. Volume: 142 .
Authors: Sagar Kallepelli; Satish Maheshwaram; Narendar Vadthiya
DOI 10.1016/j.mejo.2023.105986 Crossref Crossref: 3 Scopus Scopus: 3

Benchmarking and Optimization of Circular Double Gate Transistor (CDGT) for Sub 10 nm Nodes

Journal Article
SILICON. Year: 2023. Volume: 15 , Issue: 8 , Pages: 3549-3558 .
Authors: Kallepelli Sagar; Satish Maheshwaram
DOI 10.1007/s12633-022-02282-6 Crossref Crossref: 4 Scopus Scopus: 5

Performance Analysis of Sub 10 nm Double Gate Circular MOSFET

Journal Article
SILICON. Year: 2022. Volume: 14 , Issue: 15 , Pages: 9431-9439 .
Authors: Kallepelli Sagar; Satish Maheshwaram
DOI 10.1007/s12633-022-01668-w Crossref Crossref: 8 Scopus Scopus: 9

A Novel Vertically Stacked Circular Nanosheet FET for High-Performance Applications

Journal Article
ECS Journal of Solid State Science and Technology. Year: 2022. Volume: 11 , Issue: 6 .
Authors: Sagar Kallepelli; Satish Maheshwaram
DOI 10.1149/2162-8777/ac71c9 Crossref Crossref: 6 Scopus Scopus: 6

Performance Comparison of Circular Double Gate Transistor (CDGT) with Novel Architectures for High-Performance Applications

Conference Paper
Year: 2022. Pages: 148-152 .
Authors: Kallepelli Sagar; Maheshwaram Satish
DOI 10.1109/iSES54909.2022.00039 Crossref Crossref: 1 Scopus Scopus: 2

A novel circular double-gate SOI MOSFET with raised source/drain

Open Access
Journal Article
Semiconductor Science & Technology. Year: 2021. Volume: 36 , Issue: 6 .
Authors: Sagar Kallepelli; Satish Maheshwaram
DOI 10.1088/1361-6641/abf0e6 Crossref Crossref: 21 Scopus Scopus: 23

Performance Evaluation of High-k Engineered Nanosheet FETs in High-Speed Digital Circuits

Conference Paper
Year: 2026. Pages: 1-6 .
Authors: Chaithanya Pasunuti; Kallepelli Sagar; P.Soni Reddy
DOI 10.1109/VLSISATA69163.2026.11610188
Showing 1 to 8 of 11 publications