Vidwan-ID : 426810

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Academic

Orcid Id 0000-0002-4724-0648
Scopus Id 57336927400
Researcher Id JDM-5925-2023
Google Scholar Id C5flDJAAAAAJ

Score criteria

Criteria	Point
Personal Details	1
Expertise Details	1
Experience Details	1
Qualification Details	1
Employee ID	0.2
Orcid ID	0.2
Researcher ID	0.2
Scopus ID	0.2
Google Scholar ID	0.2
Honours <=3< /td>	0.3
Honours >3	0.5
Project worth less than Rs.5,00,000/-	0.2
Project worth more than Rs.5,00,000/-	0.5
Membership in professional Bodies < 5	0.5
Membership in professional bodies >=5	1
No of publications <=15	1
No of publications between 15-45	2
No of publications >45	3

Vidwan Score 6.8

7 Awards

Mr Swapnil Badar

Assistant Professor

Shri Sant Gajanan Maharaj College of Engineering, Shegaon-444203

Publications

4

Conference
Proceedings
7

Awards

Citations / H-Index

11 Citations

2 h-index

Google Scholar

Co-author Network

Expertise

Computer Science Hardware and Architecture

Analog and Digital VLSI

Personal Information

Mr Swapnil Badar

1986 Male

Department Of Electronics And Telecommunication Engineering, SSGMCE, Shegaon

Shegaon, Maharashtra, India - 444203

Experience

2015 - Present

Assistant Professor

Electronics and Telecommunication Engineering

Shri Sant Gajanan Maharaj College of Engineering, Shegaon-444203,Buldana, Maharashtra

Qualification

2024

Ph.D. Pursuing

Shri Sant Gajanan Maharaj College of Engineering, Shegaon-444203

Honours and Awards

2024

Best Paper Award

ICCWC-2023 Springer Conference at NIT Jalandhar, Punjab

2023

Secured 1st Rank in AAWISHKAR-Project competition at District Level

SGBAU Amravati

2023

Elite Certificate with Silver Medal for NPTEL Certification Course on

NPTEL

2024

Best Paper Award

ICCWC-2023 Springer Conference at NIT Jalandhar, Punjab

2023

Secured 1st Rank in AAWISHKAR-Project competition at District Level

SGBAU Amravati

2023

Elite Certificate with Silver Medal for NPTEL Certification Course on

NPTEL

2023

Summer Faculty Research Fellowship at IIT Delhi

IIT Delhi

2021

Best Paper award for the paper "Implementation of combinational logic for polar decoder"

ICORT-2021, ITR, DRDO, Chandipur

2020

Summer Faculty Research Fellowship at IIT Delhi

IIT Delh

2019

2nd rank for the project project “Design and Development of Analog Circuits using Unconventional CMOS Techniques for Biomedical Applications” at national level Cadence Design Contest Bangalore in Jan 2019.

Cadence, Bangalore

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Membership In Professional Bodies

2022

IEEE

Graduate Student Member

2021

IEEE

Graduate Student Member

2022

IEEE

Graduate Student Member

2021

IEEE

Graduate Student Member

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Vidwan-ID : 426810

Academic

Score criteria

Vidwan Score 6.8

Mr Swapnil Badar

Publications

Conference
Proceedings

Awards

Citations / H-Index

Google Scholar

Co-author Network

Expertise

Computer Science Hardware and Architecture

Analog and Digital VLSI

Personal Information

Mr Swapnil Badar

Experience

Assistant Professor

Qualification

Ph.D. Pursuing

Honours and Awards

Best Paper Award

Secured 1st Rank in AAWISHKAR-Project competition at District Level

Elite Certificate with Silver Medal for NPTEL Certification Course on

Best Paper Award

Secured 1st Rank in AAWISHKAR-Project competition at District Level

Elite Certificate with Silver Medal for NPTEL Certification Course on

Summer Faculty Research Fellowship at IIT Delhi

Best Paper award for the paper "Implementation of combinational logic for polar decoder"

Summer Faculty Research Fellowship at IIT Delhi

2nd rank for the project project “Design and Development of Analog Circuits using Unconventional CMOS Techniques for Biomedical Applications” at national level Cadence Design Contest Bangalore in Jan 2019.

Membership In Professional Bodies

IEEE

IEEE

IEEE

IEEE

Publications (4)

Contact Us

Vidwan-ID : 426810

Academic

Score criteria

Vidwan Score 6.8

Mr Swapnil Badar

Publications

Conference Proceedings

Awards

Citations / H-Index

Google Scholar

Co-author Network

Publications - 4 Co-author - 2

Expertise

Computer Science Hardware and Architecture

Analog and Digital VLSI

Personal Information

Mr Swapnil Badar

Experience

Assistant Professor

Qualification

Ph.D. Pursuing

Honours and Awards

Best Paper Award

Secured 1st Rank in AAWISHKAR-Project competition at District Level

Elite Certificate with Silver Medal for NPTEL Certification Course on

Best Paper Award

Secured 1st Rank in AAWISHKAR-Project competition at District Level

Elite Certificate with Silver Medal for NPTEL Certification Course on

Summer Faculty Research Fellowship at IIT Delhi

Best Paper award for the paper "Implementation of combinational logic for polar decoder"

Summer Faculty Research Fellowship at IIT Delhi

2nd rank for the project project “Design and Development of Analog Circuits using Unconventional CMOS Techniques for Biomedical Applications” at national level Cadence Design Contest Bangalore in Jan 2019.

Membership In Professional Bodies

IEEE

IEEE

IEEE

IEEE

Publications (4)

Contact Us

Conference
Proceedings