Ministry of Education
Silpa Kesav Velagaleti
VIDWAN ID: 367888

Dr Silpa Kesav Velagaleti

Female Doctor of Philosophy
Assistant Professor | Department of Electronics and Communication Engineering
CVR College of Engineering
Telangana
Expertise: Telecommunications
ORCID 0000-0002-1127-8601 Scopus 55803936700 ResearcherID HTR-6804-2023 Google Scholar mZOhVjAAAAAJ
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17 Publications
0 Projects
34 Scopus Citations
78 CrossRef
15 Years 3 Months Total Experience
Publications
17 Total
Articles
6
Proceedings
11
Activity

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Scopus Scopus
34 Citations
3 h-index
CrossRef CrossRef
78 Citations
6 h-index
Google Scholar Google Scholar

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Professional Recognition

Prathibha Award
2000
Government of Andhrapradesh

Community & Membership

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IETE
Life Member

Personal Details

Doctor of Philosophy
2022
N/A
Assistant Professor
Jun 2011 – Present
CVR College of Engineering | Department of Electronics and Communication Engineering
Engineering and Technology
Telecommunications

Related Profiles

Scholarly Work

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SUCCESSIVE APPROXIMATION REGISTER-ANALOG TO DIGITAL CONVERTER FOR WIRELESS IMPLANTABLE APPLICATIONS

1)SILPA KESAV VELAGALETI 2)NAYANATHARA KOTIKALAPUDI SATTIRAJU 3)BANGALORE KOTA MADHAVI
- Application No. : 202041056496 A Filed : 25-12-2020
Published : 01-01-2021 Published

Scholarly Publications

Design of 8-bit ALU Using OAI Logic at Subthreshold Voltage

Conference Paper
Year: 2023. Pages: 1-7 .
Authors: Silpa Kesav Velagaleti; D Lahari
DOI 10.1109/inocon57975.2023.10100982 Crossref Crossref: 4

Design of Dynamic Latched Comparator using the Offset Calibration Technique

Conference Paper
Authors: SilpaKesav V

Design of Low Power SAR ADC for ECG Using 45nm CMOS Technology

Journal Article
Year: 2017. Volume: 8 , Issue: 1 , Pages: 19-29 .
Authors: SilpaKesav V
DOI 10.5121/vlsic.2017.8102 Crossref Crossref: 4

A High Accuracy Sample and Hold Circuit with Reduced Non-Linearity Errors for SAR ADC in 45nm CMOS process

Conference Paper
Year: 2019.
Authors: SilpaKesav V
DOI 10.2139/ssrn.3355133 Crossref Crossref: 2

A Sample and Hold with Clock Booster for Improved Linearity

Conference Paper
Year: 2019. Pages: 1058-1062 .
Authors: SilpaKesav V
DOI 10.1109/spin.2019.8711660 Crossref Crossref: 7

Impact on the Physical Design flow, due to Repositioning the Macros in the Floorplan stage of Video decoder at Lower Technologies

Conference Paper
Year: 2019. Pages: 1-6 .
Authors: SilpaKesav V; Silpa kesav .v
DOI 10.1109/discover47552.2019.9007953 Crossref Crossref: 1

Design considerations of high linear SAR-ADC for wireless implantable systems

Journal Article
Materials Today: Proceedings. Year: 2020.
Authors: SilpaKesav V
DOI 10.1016/j.matpr.2020.10.488 Crossref Crossref: 2

A 9.38-bit, 422nW, high linear SAR-ADC for wireless implantable system

Journal Article
Telkomnika: Indonesian journal of electrical engineering. Year: 2021. Volume: 19 , Issue: 2 , Pages: 547 .
Authors: SilpaKesav V
DOI 10.12928/telkomnika.v19i2.18318 Crossref Crossref: 11
Showing 1 to 8 of 17 publications