Ministry of Education
Toral Shah
VIDWAN ID: 325658

Dr Toral Shah

Female Doctor of Philosophy
Assistant Professor
Maharashtra
Expertise: Computer Science Hardware and Architecture
ORCID 0000-0003-4037-2418 Scopus 57075847800 Google Scholar PnFFhqkAAAAJ
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10 Publications
0 Projects
29 Scopus Citations
26 CrossRef
16 Years 6 Months Total Experience
Publications
10 Total
Articles
1
Proceedings
9
Activity

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Scopus Scopus
29 Citations
4 h-index
CrossRef CrossRef
26 Citations
3 h-index
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Professional Recognition

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Community & Membership

Arts Committee
Faculty Incharge
Mar 2023
Engineering Events Committe
Convener
Sep 2022
Library Committee
STME Representative
Nov 2019
IEEE
Professional
Jan 2022
IIC
Member
Jan 2022

Personal Details

Doctor of Philosophy
2018
N/A
Master of Engineering
2007
N/A
Bachelor of Engineering
1999
N/A
Assistant Professor
Jun 2019 – Jan 2000
Unknown Organization
Teaching Assistant
Jan 2013 – Aug 2018
Indian Institute of Technology, Bombay
Assistant Professor - Senior Scale
Feb 2002 – Jul 2011
K J Somaiya College of Engineering Vidyanagar Campus Vidyavihar Mumbai
Lecturer
Jan 2000 – Apr 2001
Thadomal Shahani Engineering College 32nd Road TPS III Bandra Mumbai 400 050
Engineering and Technology
Computer Science Hardware and Architecture

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Organisation (0)

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Scholarly Work

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Scholarly Publications

SignEase: Real-Time Translation of Indian Sign Language to Text using CNN Architecture

Conference Paper
Year: 2025. Pages: 1-5 .
Authors: Kothari, K.; Singh, Y.; Palve, S.; Shah, T.
DOI 10.1109/ICISCN64258.2025.10934504

MediMitra: An AI-Powered Solution to Healthcare Accessibility Gaps in Underserved Populations

Conference Paper
ECS Transactions. Year: 2025.
Authors: Haripriya Saraf; Lakshmeesh Mankame; Manjindar Singh Shiledar; Toral Shah
DOI 10.1109/PuneCon67554.2025.11378196

A Comparative Analysis of Constraint Programming and Genetic Algorithms for Automated University Timetable Generation

Conference Paper
ECS Transactions. Year: 2025.
Authors: Siddesh Lohkare; Shrutee Salpe; Parth Gupta; Shailendra Aote; Toral Shah
DOI 10.1109/PuneCon67554.2025.11379218

Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design

Journal Article
Journal of Electronic Testing. Year: 2018. Volume: 34 , Issue: 1 , Pages: 53-65 .
Authors: Toral Shah; Anzhela Matrosova; Masahiro Fujita; Virendra Singh
DOI 10.1007/s10836-018-5703-3 Crossref Crossref: 10 Scopus Scopus: 10

Test pattern generation to detect multiple faults in ROBDD based combinational circuits

Conference Paper
Year: 2017. Pages: 211-212 .
Authors: Toral Shah; Anzhela Matrosova; Virendra Singh
DOI 10.1109/IOLTS.2017.8046223 Crossref Crossref: 5 Scopus Scopus: 5

Testing multiple stuck-at faults of ROBDD based combinational circuit design

Conference Paper
Year: 2017.
Authors: Toral Shah; Anzhela Matrosova; Binod Kumar; Masahiro Fujita; Virendra Singh
DOI 10.1109/LATW.2017.7906753 Crossref Crossref: 3 Scopus Scopus: 4

ROBDD based path delay fault testable combinational circuit synthesis

Conference Paper
Year: 2016.
Authors: Toral Shah; Virendra Singh; Anzhela Matrosova
DOI 10.1109/EWDTS.2016.7807682 Crossref Crossref: 3 Scopus Scopus: 5

PDF testability of a combinational circuit derived by covering ROBDD nodes using Invert-And-Or circuits

Conference Paper
Year: 2015.
Authors: Toral Shah; Anzhela Matrosova; Virendra Singh
DOI 10.1109/ISVDAT.2015.7208130 Crossref Crossref: 2 Scopus Scopus: 3
Showing 1 to 8 of 10 publications