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Personal Details 1
Expertise Details 1
Experience Details 1
Qualification Details 1
Employee ID 0.2
Orcid ID 0.2
Isi ID 0.2
Scopus ID 0.2
Google Scholar ID 0.2
Honours <=3< /td> 0.3
Honours >3 0.5
Project worth less than Rs.5,00,000/- 0.2
Project worth more than Rs.5,00,000/- 0.5
Membership in professional Bodies < 5 0.5
Membership in professional bodies >=5 1
No of publications <=15 1
No of publications between 15-45 2
No of publications >45 3

Vidwan Score 8.2

82% Complete
7 Articles
1 Conferences
1 Books
3 Projects
2 Awards

Dr Chetan Kumar Vudadha

Assistant Professor
Birla Institute of Technology and Science, Pilani

Publications

  • 7
    Journal Articles
  • 1
    In Proceedings
  • 1
    Book
  • 23
    Conference
    Proceedings
  • 3
    Projects
  • 2
    Awards

Citations / H-Index

228 Citations
10 h-index
164 Citations

Altmetrics

3
1
2
15
1

Google Scholar


Co-author Network


Expertise

Electrical and Electronic Engineering

Computer Arithmetic, CNFET based MVL Circuits, FPGA based System Design

Personal Information

Dr Chetan Kumar Vudadha

1984 Male
Birla Institute Of Technology & Science, Pilani Hyderabad Campus Jawaharnagar, Kapra Mandal
, Telangana, India - 333031


Experience

  • Assistant Professor

    Department of Electrical and Electronics Engineering

    Birla Institute of Technology and Science, Pilani,Jhunjhunu

  • Visiting Faculty

    Department of Electrical and Electronics engineering

    Birla Institute of Technology and Science, Pilani,Jhunjhunu

  • Lecturer

    Department of Electrical and Electronics engineering

    Birla Institute of Technology and Science, Pilani,Jhunjhunu

  • Project Engineer

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    Wipro Technologies,Bangalore, Hyderabad


Qualification

  • Ph.D

    Birla Institute of Technology and Science, Pilani


Honours and Awards

2013

Bronze Leaf Certificate

IEEE PrimeAsia 2013

2007

Best Campus Recruit

Wipro Technologies

2013

Bronze Leaf Certificate

IEEE PrimeAsia 2013

2007

Best Campus Recruit

Wipro Technologies

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Membership In Professional Bodies

2011

Institute of Electrical and Electronics Engineers (IEEE)

Member

2011

Institute of Electrical and Electronics Engineers (IEEE)

Member

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Research Projects

RISC-V based Approximate Processor and its FPGA Prototype for Image processing Applications

Funding Agency : BITS-Pilani

A Novel 2:1 Multiplexer based Approach to Implement Ternary Logic Circuits

Funding Agency : SERB

Design and Synthesis methodologies for CNFET-based Multi-Valued Logic Circuits.

Funding Agency : BITS-Pilani

RISC-V based Approximate Processor and its FPGA Prototype for Image processing Applications

Funding Agency : BITS-Pilani

A Novel 2:1 Multiplexer based Approach to Implement Ternary Logic Circuits

Funding Agency : SERB

Design and Synthesis methodologies for CNFET-based Multi-Valued Logic Circuits.

Funding Agency : BITS-Pilani

Read Less

Publications (31)