Joshi Soumya
VIDWAN ID: 228770

Prof Joshi Soumya

Female Doctor of Philosophy
Associate Professor | Department of Electrical and Electronics engineering
Birla Institute of Technology & Sciences, Pilani
Telangana
Expertise: Electrical and Electronic Engineering
79 Publications
0 Projects
717 Scopus Citations
594 CrossRef
11 Years 3 Months Total Experience
Publications
79 Total
Articles
28
Books
1
Chapters
2
Proceedings
48
Activity

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Scopus Scopus
717 Citations
16 h-index
CrossRef CrossRef
594 Citations
14 h-index
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Professional Recognition

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Personal Details

Doctor of Philosophy
Indian Institute of Technology, Roorkee
Associate Professor
Jan 2023 – Present
Birla Institute of Technology & Sciences, Pilani | Department of Electrical and Electronics engineering
Assistant Professor
Jun 2015 – Dec 2022
Birla Institute of Technology & Sciences, Pilani | Department of Electrical and Electronics engineering
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

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Strategies for Fault Tolerant Network on Chip Design

University Bits Pilani
Year 2023
Downloads 0
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Scholarly Publications

Automated Design and Configuration of RISC-V based NoC-MPSoC Framework on FPGA

Conference Paper
Year: 2024.
Authors: Mekala Bindu Bhargavi; Sai Siddharth Rokkam; Sri Parameswaran; Soumya J

UPQ-RV: A Unified Peripheral Event Queue Architecture for Low-Power and Parallel Communication on RISC-V

Conference Paper
Year: 2026.
Authors: Shruti Pandey; Anakhi Hazarika; Nikumani Choudhury; Aryan Kaushik; Soumya J.

FPGA Implementation of Novel Routing Algorithm for Butterfly-Fat-Tree Topology based NoC Design

Conference Paper
Year: 2019. Pages: 69-72 .
Authors: P. Veda Bhanu; S. Jagadheesh; Vasanth Bhat; Garima Agarwal; J Soumya

Design Automation of Network-on-Chip Prototype on FPGA

Conference Paper
Year: 2019.
Authors: Divyansh Mahajan; Swarali Patil; Wagh Vipul Shashikant; Mohit Dangayach; P. Veda Bhanu; J Soumya

Flexible Processor Architecture Design

Conference Paper
Year: 2019.
Authors: Dvivedi Rohan Vipulkumar; P. Veda Bhanu; J Soumya

A link fault tolerant routing algorithm for mesh of tree based network-on-chips

Conference Paper
Year: 2019. Pages: 181-184 .
Authors: Joshua Pushparaj; Veda Bhanu P; Soumya J

Fault-Tolerant Application-Specific Topology-Based NoC and Its Prototype on an FPGA

Open Access
Journal Article
IEEE Access. Year: 2021. Volume: 9 , Pages: 76759-76779 .
Authors: P. Veda Bhanu; Rahul Govindan; Rajat Kumar; Vishal Singh; J. Soumya; Linga Reddy Cenkeramaddi

Flexible Spare Core Placement in Torus Topology Based NoCs and Its Validation on an FPGA

Open Access
Journal Article
IEEE Access. Year: 2021. Volume: 9 , Pages: 45935-45954 .
Authors: P. Veda Bhanu; Rahul Govindan; Plava Kattamuri; J. Soumya; Linga Reddy Cenkeramaddi
Showing 1 to 8 of 79 publications