An investigation into CMOS implementation and applications of third generation current conveyors
UniversityUttarakhand Technical University
Year2016
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Design and Implementation of Memory-based Multipliers for Digital Filters
UniversityGuru Gobind Singh Indraprastha University
Year2021
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An Investigation into selected class of non-linear analog signal processing circuits
UniversityI I T I S M Dhanbad
Year2024
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An Investigation into Some Classes of Fractional-Order Analog Signal Processing/Generation Circuits
UniversityGuru Gobind Singha Indraprastha University New Delhi
Year2024
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Analytical Modeling, Simulation and Characterization of Nanoscale Gate All Around MOSFET Structures for Circuit Applications
UniversityGuru Gobind Singha Indraprastha University New Delhi
Year2024
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Scholarly Publications
A Novel Pseudo-Taylor-Exponential Approximation Technique for Input–Output Range Extension with Reduced Linearity Error and its Current-Mode CMOS Implementation
Realization of current mode KHN-equivalent biquad employing third generation current conveyor
Conference Paper
Year: 2016.
Pages: 558-562
.
Authors: Arora, T.S.; Sharma, R.K.
Gate All Around 22 nm SOI Schottky Barrier MOSFET with High I<sub>ON</sub>/I<sub>OFF</sub> Current Ratio for Low-Power Digital and Analog Circuit Applications
Conference Paper
Year: 2023.
Pages: 65-72
.
Authors: Saxena, A.; Sharma, R.K.; Kumar, M.; Gupta, R.S.
Cylindrical SOI Schottky Barrier MOSFET with High Linearity and Low Static Power for Digital and Analog Circuits Application