Santosh Kumar Gupta
VIDWAN ID: 104682

Dr Santosh Kumar Gupta

Male Doctor of Philosophy
Associate Professor | Department of Electronics and Communication Engineering
Motilal Nehru National Institute of Technology, Allahabad
Uttar Pradesh
Expertise: Electrical and Electronic Engineering
112 Publications
5 Projects
691 Scopus Citations
605 CrossRef
24 Years 7 Months Total Experience
Publications
112 Total
Articles
69
Chapters
5
Proceedings
38
Activity

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Scopus Scopus
691 Citations
16 h-index
CrossRef CrossRef
605 Citations
14 h-index
Google Scholar Google Scholar

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Professional Recognition

Honorary Rosalind Member of London Journals Press
2021
London Journals Press (UK)

Community & Membership

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The Institution of Engineers
Fellow [F-125927-6
Jan 2018
IEEE
Member [90590567
Jan 2009
IEEE
Senior Member
Jan 2024

Personal Details

Doctor of Philosophy
2014
South Asian University
Master of Technology
2002
Indian Institute of Technology, Hyderabad
Bachelor of Engineering
2000
N/A
Associate Professor
Mar 2018 – Present
Motilal Nehru National Institute of Technology, Allahabad | Department of Electronics and Communication Engineering
Assistant Professor (Grade-I)
Jan 2013 – Mar 2018
Motilal Nehru National Institute of Technology, Allahabad
Lecturer - Senior Scale
Jul 2008 – Dec 2012
National Institute of Technology, Silchar
Lecturer
Sep 2005 – Jul 2008
National Institute of Technology, Silchar
Lecturer
Feb 2002 – Sep 2005
Bipin Tripathi Kumaon Institute of Technology
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

Design and Fabrication of Digitally Assisted CMOS Transmitter Frontend for Indian Long Range (i-LoRa) Application” for the consortium project entitled “ML Enabled RISC-V based I - LoRa SOC for Forest event monitoring
Other
Agency: Ministry of Electronics & Information Technology Role: Co-Principal Investigator Grant: EE-9/2/2021-R&D-E/3080449
To Develop, Implement and Test FPGA Based Low Power Wireless Sensor Network With Front End and Receiver Modules
Other
Role: Principal Investigator
Analysis of Various Structures of MTJs for Possible Application in MRAMs and Logic Circuits
Other
Agency: Council of Scientific and Industrial Research Role: Principal Investigator Grant: 09/1032(0014) 2K18 EMR-I dated April 17 2018
Special Manpower Development Program Chip to System Design (SMDP-C2SD
Other
Agency: Ministry of Electronics & Information Technology Role: Co-Principal Investigator
Special Manpower Development Program – II (SMDP-II) in the area of VLSI Design and related softwares
Completed
Role: Principal Investigator

Performance Analysis and Enhancement of Heterostructure Field Effect Transistors

University Motilal Nehru National Institute of Technology, Allahabad
Year 2020
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Modeling and Performance Analysis of Dual Material Gate All Around Tunnel FETs

University Motilal Nehru National Institute of Technology, Allahabad
Year 2020
Downloads 0

Design, Modeling and Analysis of Charge Plasma based Junctionless Transistors

University Motilal Nehru National Institute of Technology Allahabad
Year 2021
Downloads 0

High Speed Low Power Current Steering DAC with Enhanced Dynamic Performances

University Motilal Nehru National Institute of Technology Allahabad
Year 2022
Downloads 0

Ab-initio Analysis of some MTJ Structures for Enhanced Performance

University Motilal Nehru National Institute of Technology Allahabad
Year 2023
Downloads 0

High performance mixer design for IoT applications

University Motilal Nehru National Institute of Technology Allahabad
Year 2023
Downloads 0

High Throughput Video Coding Hardware Architectures for UHD Applications

University Motilal Nehru National Institute of Technology Allahabad
Year 2023
Downloads 0

Design and Performance Analysis of Nanoscale Multigate MOSFETs

University Motilal Nehru National Institute of Technology Allahabad, Prayagraj
Year 2024
Downloads 0
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Scholarly Publications

Corner effects in SOI-Tri gate FinFET structure by using 3D Process and Device Simulations

Conference Paper
Year: 2010. Volume: 9 , Pages: 704-707 .
Authors: M. Pavan Kumar; Santosh Kr. Gupta; Madhumita Paul

Corner effects in SOI-Tri gate FinFET structure by using 3D process and device simulations

Conference Paper
Year: 2010. Pages: 683-686 .
Authors: M. Pavan Kumar; Santosh Kr. Gupta; Madhumita Paul

Simulation and optimization of lightly-doped ultra-thin Triple Metal Double Gate (TM-DG) MOSFET with high-K dielectric for diminished short channel effects

Conference Paper
Year: 2011. Pages: 221-224 .
Authors: Santosh Kumar Gupta; Achinta Baidya; S. Baishya

3D-TCAD simulation study of an electrically induced Source/drain cylindrically surrounding gate MOSFETs for reduced SCEs and HCEs

Conference Paper
Year: 2011. Volume: 2 , Pages: 429-432 .
Authors: Santosh Kumar Gupta; Srimanta Baishya

Design and Simulation of a Two Stage OPAMP Using DG MOSFETs for Low Power and Low Voltage Applications

Journal Article
Year: 2011.
Authors: Santosh Kumar Gupta; Gaurab Gunjan Pathak; Debajit Das; Chandan Sharma

Double gate MOSFET and its application for efficient digital circuits

Conference Paper
Year: 2011.
Authors: Gupta, S.K.; Pathak, G.G.; Das, D.; Sharma, C.

Design and simulation of an improved dual band LNA for WLAN applications

Conference Paper
Year: 2010. Pages: 678-682 .
Authors: Gupta, S.K.; Garg, A.; Singh, N.P.

Simulation and Analysis of Gate Engineered Triple Material Double Gate MOSFETs for Diminished Short Channel Effects

Journal Article
Year: 2012.
Authors: Santosh Kumar Gupta; Achinta Baidya; S. Baishya
Showing 1 to 8 of 112 publications