Ministry of Education
Dhanabal Rengasamy
VIDWAN ID: 89009

Dr Dhanabal Rengasamy

Male Doctor of Philosophy
Assistant Professor | School of Electronics Engineering
Vellore Institute of Technology, Vellore
Tamil Nadu
Expertise: Computer Science Hardware and Architecture
ORCID 0000-0002-6978-1605 Scopus 55155612500 ResearcherID L-6734-2017 Google Scholar REHbKNYAAAAJ
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44 Publications
0 Projects
241 Scopus Citations
80 CrossRef
19 Years 7 Months Total Experience
Publications
44 Total
Articles
22
Books
4
Proceedings
18
Activity

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Scopus Scopus
241 Citations
8 h-index
CrossRef CrossRef
80 Citations
6 h-index
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Personal Details

Doctor of Philosophy
2022
N/A
Master of Technology
2002
SRI SRI UNIVERSITY
Assistant Professor
Feb 2007 – Present
Vellore Institute of Technology, Vellore | School of Electronics Engineering
Engineering and Technology
Computer Science Hardware and Architecture

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Scholarly Work

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Scholarly Publications

Design and implementation of floating point unit using 15 nm FIFET

Open Access
Journal Article
Indian Journal of Science and Technology. Year: 2016. Volume: 9 , Issue: 37 .
Authors: R. Dhanabal; Sarat Kumar Sahoo
DOI 10.17485/ijst/2016/v9i37/102131

Dual-Level Secured Autonomous Bank Locker System

Open Access
Journal Article
International Journal on Recent and Innovation Trends in Computing and Communication. Year: 2023. Volume: 11 , Issue: 4 , Pages: 269-277 .
Authors: Shanmugasundaram M; Bagubali A; Rajesh R; Hemprasad Yashwant Patil; Dhanabal R; Karthikeyan A; Ann Mary Andrews; Akshit Nagpal
DOI 10.17762/ijritcc.v11i4.6452 Scopus Scopus: 1

ARIA: Autonomous Runtime Intelligence Architecture for AI Data-centre Adaptive Approximate Multipliers

Conference Paper
Year: 2026.
Authors: A R Zailesh; R Dhanabal
DOI 10.1109/NELeX69209.2026.11590126

Classification of Kidney Abnormalities in CT Images using Deep Learning

Conference Paper
Year: 2025.
Authors: Dhanabal R; Nikeel Ram B; Karthikeyan L
DOI 10.1109/SENNET64220.2025.11136059

Karatsuba Algorithm based Modified Architecture for Carry Save Multiplication

Conference Paper
Year: 2025.
Authors: Ayush Soni; Athul Biju; Sneha Shrivastav; Dhanabal R
DOI 10.1109/SENNET64220.2025.11136099

Design and Analysis of on-Chip Spiral Inductors Using Automatic Generated Layouts through SKILL Code

Conference Paper
Year: 2018. Pages: 887-891 .
Authors: K Abhishek; K Harini; B Rachana; T. Sobhana; R Dhanabal
DOI 10.1109/ICEECCOT43722.2018.9001536 Crossref Crossref: 2 Scopus Scopus: 2

Design of Single Precision Floating Point Arithmetic Logic Unit

Conference Paper
Year: 2018. Pages: 133-137 .
Authors: Nisha Singh; R Dhanabal
DOI 10.1109/ICEES.2018.8442343 Crossref Crossref: 3 Scopus Scopus: 3

Asic Implementation of Efficient Floating Point Multiplier

Conference Paper
Year: 2018. Pages: 138-141 .
Authors: Pasupuleti Anuhya; R. Dhanabal
DOI 10.1109/ICEES.2018.8443236 Crossref Crossref: 3 Scopus Scopus: 5
Showing 1 to 8 of 44 publications