Sudha Devarasetty
VIDWAN ID: 609974

Dr Sudha Devarasetty

Female Doctor of Philosophy
Associate Professor | Department of Electronics and Communication Engineering
CMR College of Engineering & Technology (2018 - 2008)
Expertise: Telecommunications
20 Publications
0 Projects
35 Scopus Citations
29 CrossRef
10 Years Total Experience
Publications
20 Total
Articles
4
Chapters
1
Proceedings
15
Activity

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Scopus Scopus
35 Citations
3 h-index
CrossRef CrossRef
29 Citations
2 h-index
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Personal Details

Doctor of Philosophy
2019
Ajmal Khan Tibbiya College
Associate Professor
Dec 2018 – Dec 2008
CMR College of Engineering & Technology | Department of Electronics and Communication Engineering
Associate Professor
Dec 2008 – Dec 2008
CMR College of Engineering & Technology | Department of Electronics and Communication Engineering
Associate Professor
Dec 2008 – Nov 2018
CMR College of Engineering & Technology | Department of Electronics and Communication Engineering
Engineering and Technology
Telecommunications

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Scholarly Work

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MOTORCYCLE SIDE STAND FOR AUTOMATIC RETRIEVAL

CMRCET
- Application No. : 202141051088 A Filed : 08-11-2021
Published : 19-11-2021 Published

COVID 19 DETECTION USING ADVANCED CNN

Department of ECE
CMR College of Engineering and Technology Hyderabad
- Patent No. : 47/2021 Filed : 05-11-2021
Published : 19-11-2021 Published

ROBA MULTIPLIER-DRIVEN FIR FILTER SYNTHESIS: UNITING EFFICIENCY AND SPEED FOR ENHANCED DIGITAL SIGNAL PROCESSING

SUDHA
- Application No. : 202441051118 A Filed : 30-11--0001
Published : 30-11--0001 Published

TUBERCUOSIS DETECTION USING ARTIFICIAL INTELLIGENCE (AI)

sudha
- Application No. : No.202241001179 A Filed : 30-11--0001
Published : 30-11--0001 Published

Scholarly Publications

Analytical Model Development for Channel Potential in Junction-less Double-Gate FETs

Conference Paper
Year: 2020.
Authors: G. Amarnath; D. Sudha; D. Krishna; Srinivas Ghanate; Sreeram Karthik; A Vinod

RoBA Multiplier-Driven FIR Filter Synthesis: Uniting Efficiency and Speed for Enhanced Digital Signal Processing

Open Access
Journal Article
Journal of VLSI circuits and systems. Year: 2024. Volume: 6 , Issue: 2 , Pages: 23-30 .

Utilizing Analog Circuits by Neural-Network based Multi-Layer-Perceptron

Conference Paper
Year: 2021. Pages: 1-4 .
Authors: Sudha, D.; Amarnath, G.; Vinod, V.A.

Noise and IM3 Harmonics Cancelling in Two-Stage Wideband Differential LNA

Conference Paper
Year: 2021. Pages: 1-4 .
Authors: Amarnath, G.; Vinod, A.; Sudha, D.

Analysis of Temperature Effect on Small-Signal-Equivalent-Circuit Parameters for AlInN/GaN MOS-HEMT

Conference Paper
Year: 2020.
Authors: G. Amarnath; D. Sudha; S. K. Hima Bindhu

Graph-optimized Neural Networks with Topological Embeddings for Scalable Cyber Threat Detection in Internet of Things Network

Conference Paper
Year: 2025.
Authors: M. Pandimadevi; Laith Hussein Jasim; D. Sudha; Guttumukkala Prasanthi; P Venkatapathi; Ashok Kumar K

A low-power CMOS VCO with 3–13.7 GHz tuning and –89.6 dB/Hz phase noise using current-starved negative skew topology

Journal Article
Analog Integrated Circuits and Signal Processing. Year: 2026. Volume: 128 , Issue: 3 .
Authors: Chokkakula Ganesh; Asisa Kumar Panigrahy; Rambabu Kusuma; D. Sudha; Aruru Sai Kumar; Shridhar B. Devamane

Gate Stack Analysis of Junctionless Multi-Bridge-Channel FETs for Sub-3 nm Chips

Open Access
Journal Article
IEEE Open Journal of Nanotechnology. Year: 2025. Volume: 6 , Pages: 102-111 .
Authors: Vakkalakula Bharath Sreenivasulu; N Neelima; D Sudha; Prasad M; Asisa Kumar Panigrahy; Aruru Sai Kumar
Showing 1 to 8 of 20 publications