Shalu Jindal
VIDWAN ID: 546199

Ms Shalu Jindal

Female Master of Technology
Assistant Professor | Department of Electronics and Communication Engineering
Maharaja Agrasen Institute of Technology
Delhi
Expertise: Electrical and Electronic Engineering
10 Publications
0 Projects
42 Scopus Citations
44 CrossRef
12 Years 1 Month Total Experience
Publications
10 Total
Articles
4
Proceedings
6
Activity

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Scopus Scopus
42 Citations
5 h-index
CrossRef CrossRef
44 Citations
5 h-index
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Professional Recognition

Commendable Research Award
2024
IGDTUW

Community & Membership

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IEEE
member

Personal Details

Master of Technology
2013
Government Post Graduate College, Ambala Cantt.
Bachelor of Technology
2009
Kamalnayan Bajaj Hospital
Assistant Professor
Aug 2014 – Present
Maharaja Agrasen Institute of Technology | Department of Electronics and Communication Engineering
Assistant Professor
Aug 2014 – Jan 2026
Maharaja Agrasen Institute of Technology
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

Analytical Impact of Temperature on Ferroelectric Junction-Less Surrounding-Gate FET: Electrical Perspective

Journal Article
Authors: Shalu Garg; Jasdeep Kaur; Anubha Goel; R. S. Gupta; Subhasis Haldar

Silicon Carbide based Dielectric Modulated Triple Metal Gate All Around MOSFET (TMGAA) for Enhanced Electrical characteristics and Analog performance

Conference Paper
Year: 2025. Pages: 242-246 .
Authors: Neeti Mishra; Neha Mishra; Neeraj; Shalu Garg

High-K, Gate-Stack Engineered, Junctionless, Nanowire Ferroelectric Field Effect Transistor (J-NW-Fe-Fet) with various catalytic metals for PH3 Sensing Applications

Conference Paper
Year: 2025. Pages: 401-406 .
Authors: Shalu Garg; Jasdeep Kaur; Anubha Goel; Subhasis Haldar; R. S. Gupta

Demand Side Management Using GUI

Conference Paper
Year: 2019. Pages: 100-105 .
Authors: Neeraj; Malik, P.; Garg, S.; Singhal, K.

Technology Based Intervention to Improve Social Skills in Students on Autism Spectrum)

Conference Paper
Year: 2019. Pages: 242-246 .
Authors: Singhal, K.; Neeraj; Garg, S.

Chaotic map based steganography of gray scale images in wavelet domain

Conference Paper
Year: 2014. Pages: 689-694 .
Authors: Garg, S.; Mathur, M.

Accurate 2-D analytical model for cylindrical gate-junctionless ferroelectric-nanowire (CG-JFe-NW) MOSFET with scaled channel length

Open Access
Journal Article
Physica Scripta. Year: 2024. Volume: 99 , Issue: 5 , Pages: 055240 .
Authors: Garg, S.; Kaur, J.; Goel, A.; Haldar, S.; Gupta, R.S.

Dielectric pocket engineered, gate induced drain leakages (GIDL) and analog performance analysis of dual metal nanowire ferroelectric MOSFET (DPE-DM-NW-Fe FET) as an inverter

Journal Article
Microsystem Technologies. Year: 2024. Volume: 31 , Issue: 2 , Pages: 581-592 .
Authors: Garg, S.; Kaur, J.; Goel, A.; Haldar, S.; Gupta, R.S.
Showing 1 to 8 of 10 publications