S Moorthi
VIDWAN ID: 54042

Dr S Moorthi

Male Doctor of Philosophy
Professor
National Institute of Technology, Tiruchirapalli
Tamil Nadu
Expertise: Electrical and Electronic Engineering
90 Publications
4 Projects
701 Scopus Citations
547 CrossRef
8 Years 6 Months Total Experience
Publications
90 Total
Articles
48
Chapters
1
Proceedings
41
Activity

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Scopus Scopus
701 Citations
15 h-index
CrossRef CrossRef
547 Citations
11 h-index
Google Scholar Google Scholar

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Professional Recognition

Young Faculty Research Fellowship (YFRF
2018
National Instiute of Technology Tiruchirappalli
Post-Doctoral Fellowship
2011
Royal Institute of Technology, Sweden

Community & Membership

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The Institution of Electronics and Telecommunication Engineers (IETE)
Life Member
Indian Society For Technical Education
Life Member
Institute of Electrical and Electronics Engineers (IEEE)
Life Member
Institute of Engineers India
Associate Member
International Association of Computer Science and Information Technology (IACSIT)
Senior Member

Personal Details

Doctor of Philosophy
2008
N/A
Professor
Mar 2024 – Present
National Institute of Technology, Tiruchirapalli
Associate Professor
Mar 2018 – Mar 2024
National Institute of Technology, Tiruchirapalli | Department of Electrical and Electronics Engineering
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

A NOVEL HYBRID ENERGY SYSTEM FOR SUPPLYING ISOLATED LOADS WITH FPGA BASED ENERGY MANAGEMENT SCHEME
Completed
Agency: Ministry of New & Renewable Energy Role: Principal Investigator
DEVELOPMENT OF MICRO-GRID CONTROLLER INTEGRATED WITH MULTIPLE TYPES OF RENEWABLE SOURCES AND LOADS
Completed
Role: Principal Investigator
Optical Sensor Unit for the measurement of response times in Liquid Crystals
Completed
Role: Principal Investigator
DESIGN AND ANALYSIS OF PHASE LOCKED LOOP ARCHITECTURES USED AS HIGH SPEED CLOCK GENERATOR FOR SYSTEM ON-CHIP APPLICATION
Completed
Role: Principal Investigator

Control Strategy for WRIG system with certain power electronic converter topologies for effective utilization of wind energy

University National Institute of Technology Tiruchirappalli
Year 2013
Downloads 0

Improved neural network based optimization algorithms for harmonic estimation

University National Institute of Technology Tiruchirappalli
Year 2014
Downloads 0

Design and Development of FPGA Based Embedded System for Online Monitoring, Power Management and Control of Power Quality Conditioners in a Micro-grid

University National Institute of Technology Tiruchirappalli
Year 2016
Downloads 0

FPGA Controlled FL-DSTATCOM for Multifarious Load Compensation in Power Distribution System

University National Institute of Technology Tiruchirappalli
Year 2019
Downloads 0
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Scholarly Publications

A 52.6 mW 10-bit, 100 MS/s pipelined CMOS analog-to-digital converter

Journal Article
Journal of Low Power Electronics. Year: 2008. Volume: 4 , Issue: 2 , Pages: 208-227 .
Authors: D. Meganathan; S. Moorthi; Amrith Sukumaran; M. M. Dinesh Babu; J. Raja Paul Perinbam

A systematic design approach for low-power 10-bit 100 MS/s pipelined ADC

Journal Article
Year: 2009. Volume: 40 , Issue: 10 , Pages: 1417-1435 .
Authors: D. Meganathan; Amrith Sukumaran; M.M. Dinesh Babu; S. Moorthi; R. Deepalakshmi

Low jitter all digital phase locked loop based clock generator for high speed system on-chip applications

Journal Article
International Journal of Electronics. Year: 2009. Volume: 96 , Issue: 11 , Pages: 1183-1189 .
Authors: S. Moorthi; D. Meganathan; D. Janarthanan; P. Praveen Kumar; J. Raja Paul Perinbam

A NoC based distributed memory architecture with programmable and partitionable capabilities

Conference Paper
Year: 2010.
Authors: Mohammad Adeel Tajammul; M. A. Shami; A. Hemani; S. Moorthi

A voltage controller in photo-voltaic system without battery storage for stand-alone applications

Conference Paper
Year: 2011. Pages: 269-274 .
Authors: S. Senthil Kumar; Ganesh Dharmireddy; P. Raja; S. Moorthi

NoC based distributed partitionable memory system for a coarse grain reconfigurable architecture

Conference Paper
Year: 2011. Pages: 232-237 .
Authors: M A Tajammul; M A Shami; A Hemani; S Moorthi

Harmonic estimation using Modified ADALINE algorithm with Time-Variant Widrow Hoff (TVWH) learning rule

Conference Paper
Year: 2011. Pages: 113-118 .
Authors: B. Vasumathi; S. Moorthi

A low-jitter phase-locked loop architecture for clock generation in analog to digital converters

Conference Paper
Year: 2011. Pages: 81-84 .
Authors: S. Moorthi; D. Meganathan; M. Shankar; R. Sridhar; J. Raja paul perinbam
Showing 1 to 8 of 90 publications