YELITHOTI SRAVANA KUMAR
VIDWAN ID: 360899

Dr YELITHOTI SRAVANA KUMAR

Male Doctor of Philosophy
Associate Professor | Department of Electronics and Communication Engineering
Vignan's Institute of Engineering for Women, Kapujaggarupeta, Vadlapudi Post, Gajuwaka, PIN-530049(CC-NM)
Andhra Pradesh
Expertise: Electrical and Electronic Engineering
14 Publications
0 Projects
2 Scopus Citations
16 CrossRef
9 Years 3 Months Total Experience
Publications
14 Total
Articles
9
Books
1
Chapters
3
Proceedings
1
Activity

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Scopus Scopus
2 Citations
1 h-index
CrossRef CrossRef
16 Citations
2 h-index
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Professional Recognition

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Community & Membership

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Personal Details

Doctor of Philosophy
2025
N/A
Master of Technology
2013
Shri Raj Rajendra Jayantsen Vidyapeeth Khachrod, Distrct -Ujjain, M.P
Associate Professor
Jul 2023 – Present
Vignan's Institute of Engineering for Women, Kapujaggarupeta, Vadlapudi Post, Gajuwaka, PIN-530049(CC-NM) | Department of Electronics and Communication Engineering
Assistant Professor
Sep 2021 – Jul 2023
N S Raju Institute of Engineering & Technology, Visakhapatnam
Assistant Professor
Jun 2017 – Sep 2021
Sanketika Vidya Parishad Engineering College
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

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Scholarly Publications

Advanced VLSI Design and Testability Issues

Book Chapter
Year: 2020.

Power Efficiency Analysis of Low Power Circuits Design Techniques in 90-nm CMOS Technology

Book Chapter
Year: 2020.
Authors: YELITHOTI SRAVANA KUMAR

Sensor Network Methodologies for Smart Applications

Book
Year: 2020.

Comparison Analysis of MAC Protocols for Wireless Sensor Networks

Book Chapter
Year: 2020. Pages: 200-218 .
Authors: Tapaswini Samant; Yelithoti Sravana Kumar; Swati Swayamsiddha

Implementation of 8X1 Low Power Multiplexer using Transmission Gates

Journal Article
Year: 2017.
Authors: YELITHOTI SRAVANA KUMAR

Reversible Implementation of Ternary Content Addressable Memory (TCAM) Interface with SRAM

Journal Article
Year: 2017.
Authors: YELITHOTI SRAVANA KUMAR

Design & Study of a Low Power High Speed Full Adder using GDI Multiplexer

Journal Article
Year: 2017.
Authors: YELITHOTI SRAVANA KUMAR

Coverage Driven and Assertion Based Verification of Memory Transactions in Axi Protocol using System Verilog Approach

Journal Article
Year: 2017.
Authors: YELITHOTI SRAVANA KUMAR
Showing 1 to 8 of 14 publications