Authors: Bakkesh V. Amoghimath; H. M. Vijay; Suhas B. Shirol
Experimental analysis on the result of shielded transfer impedance for RF cables
Conference Paper
Year: 2016.
Authors: T. Pounraj; R. Senthamarai; J. Gopinathan; R. Munusamay; S. Iyappan; C R Venkatesh; A. K. Swamy; K Sreenivasalu; H. M. Vijay; V. Krishnamurthy
A Novel Approach to Analyze Current-Voltage Characteristics of Double Gated-Memristor
Conference Paper
Year: 2019.
Pages: 194-197
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Authors: H M Vijay; V N Ramakrishnan
Analysis of RC delay using Multi level interconnects
Conference Paper
Year: 2023.
Authors: S. Aathilakshmi; D. Mohamed Vaheen; Harinesh Vijay; G. Mugundan; Sanjay Kumar K; Blessy Sam A S
FPGA implementation of energy efficient Vedic multiplier using CSA architecture
Conference Paper
Year: 2023.
Authors: S. Aathilakshmi; G. Mugundan; Sanjay Kumar K; D. Mohamed Vaheen; Harinesh Vijay; V. N. Dhenishaa
FPGA Implementation of Normal Basis Multiplier Using Reversible Logic
Conference Paper
Year: 2024.
Pages: 1688-1694
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Authors: R. Pandimeena; S. Aathilakshmi; D. Mohamed Vaheen; Harinesh Vijay; Mridhullashree K; Blessy Sam. A. S
Designing and Delivering Curriculum with Early Industry Exposure Integration: A Model
Authors: School of ECE, KLE Technological University, Hubballi, India; Vijay H M; Supriya Katwe; School of ECE, KLE Technological University, Hubballi, India; Nalini Iyer; School of ECE, KLE Technological University, Hubballi, India
SCALABLE LOGIC BIST DESIGN AND ANALYSIS FOR ENHANCED TESTING OF COMBINATIONAL CIRCUITS