Vijay H M
VIDWAN ID: 358341

Dr Vijay H M

Male Doctor of Philosophy
Associate Professor | School of Electronics and Communication Engineering
KLE TECHNOLOGICAL UNIVERSITY
Karnataka
Expertise: Electrical and Electronic Engineering
25 Publications
0 Projects
45 Scopus Citations
34 CrossRef
19 Years Total Experience
Publications
25 Total
Articles
6
Chapters
1
Proceedings
18
Activity

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Scopus Scopus
45 Citations
4 h-index
CrossRef CrossRef
34 Citations
3 h-index
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Professional Recognition

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Community & Membership

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THE INDIAN SOCIETY FOR TECHNICAL EDUCATION
LIFE MEMBER
Jan 2007
THE INSTITUTION OF ELECTRONICS AND TELECOMMUNICATION ENGINEERS
MEMBER
Jan 2010

Personal Details

Doctor of Philosophy
2023
N/A
Master of Technology
2011
N/A
Bachelor of Engineering
2005
N/A
Associate Professor
Apr 2021 – Present
KLE TECHNOLOGICAL UNIVERSITY | School of Electronics and Communication Engineering
Research Scholar
Jul 2016 – Apr 2021
Vellore Institute of Technology, Vellore
Assistant Professor
Jul 2014 – Jul 2016
JAIN INSTITUTE OF TECHNOLOGY, DAVANAGERE
Assistant Professor
Aug 2006 – Dec 2012
Bapuji Institute of Engineering & Technology, DAVANAGERE
Assistant Professor
Sep 2005 – Jan 2006
UBDT College of Engineering, Davanagere
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

Neuromorphic Computing Using RRAM

Conference Paper
Year: 2025. Volume: 1420 LNEE , Pages: 99-120 .
Authors: Bakkesh V. Amoghimath; H. M. Vijay; Suhas B. Shirol

Experimental analysis on the result of shielded transfer impedance for RF cables

Conference Paper
Year: 2016.
Authors: T. Pounraj; R. Senthamarai; J. Gopinathan; R. Munusamay; S. Iyappan; C R Venkatesh; A. K. Swamy; K Sreenivasalu; H. M. Vijay; V. Krishnamurthy

A Novel Approach to Analyze Current-Voltage Characteristics of Double Gated-Memristor

Conference Paper
Year: 2019. Pages: 194-197 .
Authors: H M Vijay; V N Ramakrishnan

Analysis of RC delay using Multi level interconnects

Conference Paper
Year: 2023.
Authors: S. Aathilakshmi; D. Mohamed Vaheen; Harinesh Vijay; G. Mugundan; Sanjay Kumar K; Blessy Sam A S

FPGA implementation of energy efficient Vedic multiplier using CSA architecture

Conference Paper
Year: 2023.
Authors: S. Aathilakshmi; G. Mugundan; Sanjay Kumar K; D. Mohamed Vaheen; Harinesh Vijay; V. N. Dhenishaa

FPGA Implementation of Normal Basis Multiplier Using Reversible Logic

Conference Paper
Year: 2024. Pages: 1688-1694 .
Authors: R. Pandimeena; S. Aathilakshmi; D. Mohamed Vaheen; Harinesh Vijay; Mridhullashree K; Blessy Sam. A. S

Designing and Delivering Curriculum with Early Industry Exposure Integration: A Model

Open Access
Journal Article
Year: 2024. Volume: 38 , Issue: Special Issue 1 , Pages: 1-6 .
Authors: School of ECE, KLE Technological University, Hubballi, India; Vijay H M; Supriya Katwe; School of ECE, KLE Technological University, Hubballi, India; Nalini Iyer; School of ECE, KLE Technological University, Hubballi, India

SCALABLE LOGIC BIST DESIGN AND ANALYSIS FOR ENHANCED TESTING OF COMBINATIONAL CIRCUITS

Open Access
Journal Article
Proceedings on Engineering Sciences. Year: 2025. Volume: 7 , Issue: 2 , Pages: 1377-1386 .
Authors: Suhas Shirol; Rajashekhar Shettar; Ramakrishna S; Vijay H M
Showing 1 to 8 of 25 publications