Ministry of Education
Premachand D R
VIDWAN ID: 328665

Mr Premachand D R

Male Doctor of Philosophy
Professor
Ballari Institute of Technology & Management, BELLARY
Karnataka
Expertise: Telecommunications
Scopus 57201948820
View older version My Dashboard
6 Publications
0 Projects
19 Scopus Citations
11 CrossRef
18 Years 2 Months Total Experience
Publications
6 Total
Articles
2
Proceedings
4
Activity

No publication activity to display.

Scopus Scopus
19 Citations
2 h-index
CrossRef CrossRef
11 Citations
2 h-index
Google Scholar Google Scholar

Loading Scholar statistics...

Professional Recognition

No Data Found

There is currently nothing to display here.

Community & Membership

No Data Found

There is currently nothing to display here.

ISTE
Life Member
Jan 2006

Personal Details

Doctor of Philosophy
2023
N/A
Master of Technology
2003
N/A
Professor
Jul 2008 – Present
Ballari Institute of Technology & Management, BELLARY
Assistant Professor
Jul 2008 – Jul 2008
Ballari Institute of Technology & Management, BELLARY | Departments of Electronics and Communication Engineering
Engineering and Technology
Telecommunications

Related Profiles

Scholarly Work

No Data Found

There is currently nothing to display here.

Hybrid Framework for Image compression with Hardware Realization

University Ballari Institute of Technology and Management, Bellary
Year 2023
Downloads 0
No Data Found

There is currently nothing to display here.

Scholarly Publications

Efficient 1-Bit Full Adder Implementation with Reduced MOSFET Count

Conference Paper
Year: 2024.
Authors: D R Premachand; K M Srikantha
DOI 10.1109/NMITCON62075.2024.10699284 Crossref Crossref: 2 Scopus Scopus: 3

Effective human activity recognition approach using machine learning

Open Access
Journal Article
Journal of Robotics and Control (JRC). Year: 2021. Volume: 2 , Issue: 5 , Pages: 395-399 .
Authors: Abdul Lateef Haroon P S; Premachand D. R Premachand D. R
DOI 10.18196/jrc.25113 Crossref Crossref: 8 Scopus Scopus: 14

Novel hybrid framework for image compression for supportive hardware design of boosting compression

Open Access
Journal Article
International Journal of Electrical and Computer Engineering (IJECE). Year: 2021. Volume: 11 , Issue: 3 , Pages: 1985-1993 .
Authors: Premachand D. R.; U. Eranna
DOI 10.11591/ijece.v11i3.pp1985-1993

Sector-Selective Hybrid Scheme Facilitating Hardware Supportability Over Image Compression

Conference Paper
Year: 2020. Volume: 1224 AISC , Pages: 54-62 .
Authors: D. R. Premachand; U. Eranna
DOI 10.1007/978-3-030-51965-0_5 Crossref Crossref: 1 Scopus Scopus: 2

Design of area effective full adder using gate diffusion input logic

Conference Paper
Year: 2018. Pages: 1515-1518 .
Authors: D.R Premachand; U. Eranna; Haroon P.S Abdul Lateef
DOI 10.1109/ICEECCOT43722.2018.9001388

Design and simulation of low drop out voltage using 180nm CMOS technology

Conference Paper
Year: 2017. Volume: 2018-January , Pages: 820-824 .
Authors: D. R. Premachand; U. Eranna
DOI 10.1109/ICEECCOT.2017.8284617