Vidwan | Profile

VIDWAN ID: 321065

Mr Maragatharaj S

Male Doctor of Philosophy

Assistant Professor | Department of Electronics and Communication Engineering

Knowledge Institute of Technology (2022)

Tamil Nadu

Expertise: Multidisciplinary Engineering

0000-0002-4330-2557

52664140800

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11 Publications

0 Projects

9 Scopus Citations

7 CrossRef

11 Years 1 Month Total Experience

Publications

11 Total

Articles

Books

Proceedings

Activity

Scopus

9 Citations

2 h-index

CrossRef

7 Citations

1 h-index

Google Scholar

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Professional Recognition

FACULTY ACHIEVER AWARD

2023

KNOWLEDGE INSTITUTE OF TECHNOLOGY

FACULTY IDEA EVALUATOR FOR "TOYCATHON 2021

2021

AICTE

FACULTY ACHIEVER AWARD

2016

KNOWLEDGE INSTITUTE OF TECHNOLOGY

Community & Membership

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INDIAN SOCIETY FOR TECHNICAL EDUCATION

LIFETIME MEMBER

Jan 2013

Institute For Educational Research and Publication

PROFESSIONAL MEMBERSHIP

Jan 2017

Personal Details

Doctor of Philosophy

2024

Sultan Qaboos University, Muscat

Master of Engineering

2011

N/A

Bachelor of Engineering

2008

N/A

Assistant Professor

Jul 2022 – —

Knowledge Institute of Technology | Department of Electronics and Communication Engineering

Assistant Professor

Jun 2019 – Jun 2022

DHIRAJLAL GANDHI COLLEGE OF TECHNOLOGY, SALEM

Assistant Professor

Jun 2012 – May 2018

Knowledge Institute of Technology

Assistant Professor

Jun 2011 – May 2012

The Kavery Engineering College

Engineering and Technology

Multidisciplinary Engineering

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Organisation (0)

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Co-Authors (6)

Mr Hari Kumar Buddha Vignan's Institute of Engineering for Women, Kapujaggarupeta, Vadlapudi Post, Gajuwaka, PIN-530049(CC-NM)

Dr Vijeyakumar K N N/A

Dr Kanika Gupta IIMT University

Dr Pawanjeet Kaur N/A

Dr S Maragatharaj ECE KIOT Knowledge Institute of Technology

Mr CHAIRMAN M Dr.Mahalingam College of Engineering and Technology

Scholarly Work

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Scholarly Publications

FPGA Implementation of Area Efficient Finite Field Redundant Multipliers

Journal Article

Year: 2017.

Authors: Maragatharaj S

QCA Based Low Power Parallel Binary Adder/Subtractor Using Reversible Logic Gates

Journal Article

i-manager's Journal on Electronics Engineering. Year: 2014. Volume: 4 , Issue: 3 , Pages: 1-8 .

Authors: A. G. Sasikala; PG Scholar, ECE Department, Knowledge Institute of Technology, Salem, India; S. Maragatharaj; Assistant Professor, ECE Department, Knowledge Institute of Technology Salem, India

10.26634/jele.4.3.2673

Effective binary to BCD converter using QuantumDot Cellular Automata

Conference Paper

Year: 2014. Pages: 1-5 .

Authors: A. G. Sasikala; S. Maragatharaj; S. Jayadevi

10.1109/icdcsyst.2014.6926118

Scopus: 2

Simulation of QCA Based Binary to BCD Converter in Xilinx using HDLQ

Journal Article

i-manager's Journal on Electronics Engineering. Year: 2014. Volume: 4 , Issue: 2 , Pages: 14-21 .

Authors: A. G. Sasikala; PG Scholar, Knowledge Institute of Technology, Salem, India.; S. Maragatharaj; Assistant Professor, Knowledge Institute of Technology, Salem, India.