Srinivasulu Jogi
VIDWAN ID: 309569

Dr Srinivasulu Jogi

Male Doctor of Philosophy
Assistant Professor | Department of Electronics and Communication Engineering
National Institute of Technology, Tiruchirapalli
Tamil Nadu
Expertise: Telecommunications
22 Publications
0 Projects
89 Scopus Citations
82 CrossRef
4 Years Total Experience
Publications
22 Total
Articles
12
Proceedings
10
Activity

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Scopus Scopus
89 Citations
5 h-index
CrossRef CrossRef
82 Citations
5 h-index
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Professional Recognition

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IEEE
Senior Member - Member No: 97887451
Jan 2025

Personal Details

Doctor of Philosophy
2021
Indian Institute of Management Indore
Assistant Professor
Sep 2022 – Present
National Institute of Technology, Tiruchirapalli | Department of Electronics and Communication Engineering
Engineering and Technology
Telecommunications

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Scholarly Work

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Scholarly Publications

New realizability criterion for digital filters with external disturbance and saturation arithmetic

Journal Article
AEU - International Journal of Electronics and Communications. Year: 2018. Volume: 85 , Pages: 179-182 .
Authors: Priyanka Kokil; S. Xavier Arockiaraj; Srinivasulu Jogi; Haranath Kar

Enhancing the Accuracy and Resource Utilization of Field Programmable CRC Circuit Architecture

Conference Paper
Year: 2025. Volume: 1210 LNEE , Pages: 77-86 .
Authors: B. Naresh Kumar Reddy; Sushmita Dandeliya; Degavath Uday Kiran; Korra Praveena; Srinivasulu Jogi

Enhancing Reliability and Energy Efficiency in Network-on-Chip Architectures through Hybrid Sorting Algorithm-Based Core Mapping

Conference Paper
Year: 2025. Pages: 31-36 .
Authors: B. Naresh Kumar Reddy; Srinivasulu Jogi; Y. Charan Krishna

SecRISC-DFI: Secure RISC-V Architecture with Data-Flow Integrity Enforcement

Conference Paper
Year: 2025.
Authors: K. Kannaiah; Srinivasulu Jogi

Securing RISC-V by Reinforcing Execution with Instruction-Level Control Flow Integrity for Attack-Resistant Computing

Conference Paper
Year: 2025.
Authors: K. Kannaiah; Srinivasulu Jogi

Adaptive Hardware-Assisted Data-Flow Integrity for Secure RISC-V IoT Devices

Journal Article
Authors: K. Kannaiah; Srinivasulu Jogi; B. Naresh Kumar Reddy

Enhanced performance of full adder using advanced 9-T XOR-XNOR module

Journal Article
International Journal of Electronics. Year: 2026. Volume: 113 , Issue: 2 , Pages: 385-404 .
Authors: Srinivasulu Jogi; B. Naresh Kumar Reddy

A Secure RISC-V Processor Architecture with Pipeline AES Randomization and Speculation Attack Mitigation

Journal Article
Showing 1 to 8 of 22 publications