Ms Latha P
Associate Professor
| Electronics and Communication Engineering
R.M.K Engineering College
Tamil Nadu
Expertise:
Telecommunications
28
Publications
1
Projects
36
Scopus Citations
32
CrossRef
25 Years 11 Months Total Experience
Scopus
36
Citations
3
h-index
CrossRef
32
Citations
3
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Google Scholar
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Professional Recognition
Active SPOC Award from Swayam
2020
IITM_NPTEL
Certificate of appreciation for fostering the ecosystem and Academia bridging Government
2021
AICTE & Texas Instruments
Received Mentor Certificate for Microprocessor and Interfacing NPTEL Course
2022
IITM_NPTEL
Reviewer for regular journal paper in Springer Analog Integrated Circuits and Signal
2022
SPRINGER
Processing
Community & Membership
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ISTE
Life MemberIACSIT
Life MemberIAENG
Life MemberNITTSD
LIFEMEMBERPersonal Details
Doctor of Philosophy
2022
Sultan Qaboos University, Muscat
Master of Engineering
2007
N/A
Bachelor of Engineering
1998
N/A
Associate Professor
Jun 2002 – Present
R.M.K Engineering College
| Electronics and Communication Engineering
Assistant Professor
Oct 2000 – Jun 2002
Jerusalem College of Engineering
Engineering and Technology
Scholarly Work
Design of Affordable Accessible Low-Cost Fundus Camera for the people residing in Rural and Hilly Areas
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IoT based Intrusion Discovery and Filtering System by Using Raspberry-Pi
1 . P. LATHA 2 . Harshavardhan Naidu Sapineni 3 . G.Gugapriya 4 . Dr.Dinesh Anton Raja P 5 . Jebasingh Kirubakaran S J 6 . R.Priya 7 . Kumaran G 8 . Ms. T.D.Subha 9 . D.Kalaiselvi 10 . S.Joshua Kumaresan
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Application No. :
202241001811
Filed :
12-01-2021
Published :
28-01-2021
Filed
ELECTRODE SKIN RESISTANCE PREVENTER FOR WIRELESS CARDIAC ECG MONITORING SYSTEM
Chennai Institute of Technology
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Application No. :
202041031914
Filed :
25-07-2020
Published :
21-08-2020
Published
Scholarly Publications
DRIVER TO DRIVER COMMUNICATION USING LORA
Laser Range Finder and Velocimeter using Ultra High Performance Dual Phase TDC
LOW COST LOWPOWER FPGA BASED 2D TIME TO DIGITAL CONVERTER
Area and Power Efficient Viterbi decoder for Storage Devices
Implementation Of Buffer Optimization For Clock Skew Minimization
Design And Implementation Of Delay Line Based Time To Digital Converter Using Tristate Inverter
Design And Implementation Of Cml Logic For D Flip-Flop To Minimize Jitter
A Design Of Ring Vco With Supply Noise And Process Variation Compensation
Showing 1 to 8 of 28 publications