Ministry of Education
Satish Bhairannawar
VIDWAN ID: 258642

Dr Satish Bhairannawar

Male Doctor of Philosophy
Professor | Department of Electronics and Communication Engineering
S D M College of Engg. & Technology, DHARWAD
Karnataka
Expertise: Electrical and Electronic Engineering
ORCID 0000-0002-2576-5590 Scopus 55735489600 ResearcherID ABE-9985-2022 Google Scholar mNF7jygAAAAj
View older version My Dashboard
34 Publications
1 Projects
215 Scopus Citations
164 CrossRef
10 Years 7 Months Total Experience
Publications
34 Total
Articles
19
Chapters
1
Proceedings
14
Activity

No publication activity to display.

Scopus Scopus
215 Citations
9 h-index
CrossRef CrossRef
164 Citations
8 h-index
Google Scholar Google Scholar

Loading Scholar statistics...

Professional Recognition

Outstanding Faculty Advisor Award
2020
CAS Branch Chapter by IEEE CAS Bangalore
Young Researcher Award
2017
InSc in 2017 (An ISO 9001:2015 Certified Institute by International Accurate Certification, A
Best paper award
2017
IEEE international conference organized by VIT, Vellore

Community & Membership

IEEE International Conference on Advances in Electronics, Computers and Communications, IC
Member and Reviewer
Jan 2014
Local Inquiry Committee (LIC ), VTU, Belagavi for inspecting Engineering Colleges for gra
Member
Jan 2021
IEEE
Senior Member of IEEE
Jan 2020
IEEE
IEEE CAS Chapter
Jan 2020
InSc
Member InSc
Jan 2015

Personal Details

Doctor of Philosophy
2015
N/A
Professor
Feb 2016 – Present
S D M College of Engg. & Technology, DHARWAD | Department of Electronics and Communication Engineering
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

Instituting an Intelligent Innovation Lab setup for Precision Agriculture Services
Other
Role: Principal Investigator Grant: VGST/K-FIST(L2)/GRD-866/2019-20/2020-21/315
Amount: ₹30
Duration: 2021 – Ongoing
No Data Found

There is currently nothing to display here.

SYSTEMS AND METHODS FOR ENABLING REHABILITATION OF PHYSICAL DEXTERITY

SDM College of Engineering & Technology
- Patent No. : TEMP/E-1/36223/2021-MUM Filed : 19-07-2021
Published : 30-11--0001 Filed

Scholarly Publications

Design of Hybrid Encryption Algorithm using AES and RSA for key exchange

Journal Article
Year: 2025. Volume: 9 , Issue: 1 , Pages: 1-11 .
DOI 10.10118/SSFJ/2509101

Early Detection and Classification of Multi Crop Leaf Diseases using Custom Based CNN Model

Conference Paper
Year: 2024.
Authors: Satish Bhairannawar; Kalmeshwar Hosur; Shubham P Patil; Siddharth Bilagi
DOI 10.1109/ICEI64305.2024.10912289

FPGA implementation of high speed Vedic multiplier using CSLA for parallel FIR architecture

Conference Paper
Year: 2014.
Authors: S. Amina Naaz; M. N. Pradeep; Satish Bhairannawar; Srinivas Halvi
DOI 10.1109/ICDCSyst.2014.6926136 Crossref Crossref: 2 Scopus Scopus: 5

FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters

Conference Paper
Year: 2012.
Authors: Satish S Bhairannawar; R Rathan; K B Raja; K R Venugopal; L M Patnaik
DOI 10.1109/ICCIC.2012.6510248 Crossref Crossref: 5 Scopus Scopus: 5

Image compression using self organizing map and discrete wavelet transform with error correction

Journal Article
Year: 2017.
Authors: Raju, S.; Bhairannawar, S.S.
Scopus Scopus: 3

Color image enhancement using Laplacian filter and contrast limited adaptive histogram equalization

Conference Paper
Year: 2017. Pages: 1-5 .
Authors: Bhairannawar, S.; Patil, A.; Janmane, A.; Huilgol, M.
DOI 10.1109/IPACT.2017.8244991 Crossref Crossref: 14 Scopus Scopus: 20

Efficient medical image enhancement technique using transform HSV space and adaptive histogram equalization

Book Chapter
Year: 2018. Pages: 51-60 .
Authors: Bhairannawar, S.S.
DOI 10.1016/B978-0-12-813087-2.00003-8 Crossref Crossref: 24 Scopus Scopus: 33

An efficient FPGA based NoC architecture for data communication

Open Access
Journal Article
Year: 2018. Volume: 8 , Issue: 39 , Pages: 335-341 .
Authors: Jamagoud, V.; Bhairannawar, S.S.
DOI 10.19101/IJACR.2018.838013
Showing 1 to 8 of 34 publications