Udaysingh Rane
VIDWAN ID: 227407

Prof Udaysingh Rane

Male Doctor of Philosophy
Associate Professor | Department of Computer Science
Dnyanprassarak Mandal's College and Research Centre, Assagao, Bardez, Goa -403507
Goa
Expertise: Computer Science Information Systems
14 Publications
0 Projects
19 Scopus Citations
15 CrossRef
28 Years 1 Month Total Experience
Publications
14 Total
Articles
2
Proceedings
12
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Scopus Scopus
19 Citations
3 h-index
CrossRef CrossRef
15 Citations
2 h-index
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Personal Details

Doctor of Philosophy
1997
Inter University Consortium
Associate Professor
Aug 1998 – Present
Dnyanprassarak Mandal's College and Research Centre, Assagao, Bardez, Goa -403507 | Department of Computer Science
Engineering and Technology
Computer Science Information Systems

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Scholarly Work

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Scholarly Publications

Virtual Extended Memory Symmetric Multiprocessor (SMP) Organization Design Using LC-3 Processor: Case Study of Dual Processor

Journal Article

Network on Chip(NoC) Mesh Topology FPGA Verification: Real Time Operating System Emulation Framework

Conference Paper
Year: 2024.
Authors: Udaysing V. Rane; Charanarur Panem; Girish Abhyankar; R. S. Gad

Performance of Bit Error Rate (BER) in OOK Modulation Using Orbital Angular Momentum (OAM) Carrying Gaussian Vortex Beam

Conference Paper
Year: 2023.
Authors: Girish Abhyankar; Sandeep Gawali; Narayan Vetrekar; Udaysing Rane; R. S. Gad; G. M. Naik

Data of multilayer mesh NoC performance analysis for throughput and delay over FTP and CBR applications

Open Access
Data Paper
Data in Brief. Year: 2022. Volume: 42 .
Authors: Charanarur Panem; Udaysing V. Rane; Rajendra S. Gad

Design of Network on Chip (NoC) Computing Node for Mesh Topology using Soft-core NIOS-II Processor

Open Access
Conference Paper
Journal of Physics: Conference Series. Year: 2021. Volume: 1921 , Issue: 1 .
Authors: Udaysing V Rane; Rajendra S Gad; Charanarur Panem

Evaluation of 3D 4D Two Layer Mesh NoC for Fault Tolerance over Combinations of Vertical Channel

Conference Paper
Year: 2018.
Authors: Charanarur Panem; Rajendra S. Gad; Udaysingh V. Rane; Vinaya R. Gad

Evaluation of 2,4,8 Layer 3D Mesh NoC with Virtual Channel for Capacity Enhancement

Conference Paper
Year: 2018.
Authors: Charanarur Panem; Udaysingh V. Rane; Vinaya R. Gad; Rajendra S. Gad; G. M. Naik

Performance analysis of 16 × 16, 32 × 32, 64 × 64 2-D mesh topologies for network on chip

Conference Paper
Year: 2017. Volume: 2018-January , Pages: 1757-1764 .
Authors: Charanarur Panem; Udaysingh V. Rane; Vinaya R. Gad; A. K. P. Kovendan; D. Sridharan; Rajendra S. Gad; Gourish M. Naik
Showing 1 to 8 of 14 publications