A SYSTEM FOR VLSI LAYOUT OPTIMIZATION IN CONNECTED AND PYRAMID NETWORKS USING DEEP LEARNING
1)Ms.Arelli Shruthi Address of Applicant :Assistant Professor
Department of Electronics and Communication Engineering
St Peter's Engineering College
Hyderabad
Telangana
India. Pin Code:500100 ----------- ----------- 2)Dr.M.Sadees 3)Mr.Akula Trinadha Rao 4)Dr.V.R.Seshagiri Rao 5)Mrs.D.V.N. Bharathi
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Patent No. :
Dr.V.R.Seshagiri Rao
Filed :
22-09-2024
Published :
04-10-2024
Published
AUTOMATED IMAGE ENHANCEMENT USING AI-DRIVEN CONTEXTUAL ANALYSIS
Dr.V.R.Seshagiri Rao_Institute of Aeronautical Engineering Hyderabad
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Patent No. :
202441028399
Filed :
06-04-2024
Published :
12-04-2024
Published
SCALABLE DISTRIBUTED DENIAL OF SERVICE (DDOS) PROTECTION MECHANISM WITH DYNAMIC RESOURCE ALLOCATION AND TRAFFIC REDIRECTION STRATEGIES
Dr.V.R.Seshagiri Rao_Institute of Aeronautical Engineering_Hyderabad
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Patent No. :
202441020869
Filed :
19-03-2024
Published :
29-03-2024
Published
A SYSTEM FOR VIDEO FIGURE RETRIEVAL BASED ON DEEP LEARNING AND METHOD THEREOF
Dr.V. R.Seshagiri Rao_Institute of Aeronautical Engineering
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Patent No. :
The Patent Office Journal No. 50/2021 Dated 10/12/2021
Filed :
01-12-2021
Published :
10-12-2021
Published