Ministry of Education
CHAITHANYA D J
VIDWAN ID: 209486

Dr CHAITHANYA D J

Female Doctor of Philosophy
Assistant Professor
Vidya Vardhaka College of Engineering, MYSORE
Karnataka
Expertise: Electrical and Electronic Engineering
ORCID 0000-0002-0694-5422 Scopus 59278947800 Google Scholar ZGXyrOkAAAAJ
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46 Publications
0 Projects
83 Scopus Citations
36 CrossRef
6 Years 1 Month Total Experience
Publications
46 Total
Articles
18
Chapters
9
Proceedings
19
Activity

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Scopus Scopus
83 Citations
6 h-index
CrossRef CrossRef
36 Citations
4 h-index
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Professional Recognition

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ISTE
Life member
Jan 2016

Personal Details

Doctor of Philosophy
2024
N/A
Master of Technology
2014
N/A
Assistant Professor
Aug 2020 – Present
Vidya Vardhaka College of Engineering, MYSORE
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

Enhancing Wireless Sensor Network Reliability with a Dual Cluster Head Mechanism

Conference Paper
Year: 2025.
Authors: Amit Raikar; Chaithanya D J; Nagaraja B G
DOI 10.1109/ICEPE65965.2025.11139436 Crossref Crossref: 2 Scopus Scopus: 4

An Energy-Efficient and Delay-Sensitive Routing for Mobile Wireless Sensor Networks Using an Optimized Deep-Learning Network

Journal Article
INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS. Year: 2026. Volume: 39 , Issue: 4 .
Authors: R. Shilpa; D. J. Chaithanya; M. N. Geetha; S. Rajini; C. Lokesh
DOI 10.1002/dac.70374

Implementation of a hand gesture controlled Rover: A wireless approach to intuitive navigation and directional control

Book Chapter
Year: 2026. Pages: 298-304 .
Authors: D J Chaithanya
DOI 10.1201/9781003650201-50

Traffic prediction using machine learning: A comparison of LSTM, random forest, and gradient boosting approaches

Book Chapter
Year: 2026. Pages: 216-221 .
Authors: D J Chaithanya; R Deekshitha
DOI 10.1201/9781003650201-36

Real-time 5th generation network protocol analyzer: Performance evaluation using wireshark on user equipment

Book Chapter
Year: 2026. Pages: 386-390 .
Authors: D J Chaithanya; H K Ravikiran
DOI 10.1201/9781003650201-65

Implementation and Analysis of Various Full Adder Configuration Using Cadence Virtuoso

Book Chapter
Year: 2026. Pages: 229-242 .
Authors: S.P. Spoorthi; S.H. Bharathi; Shipra Upadhyay; D.J. Chaithanya
DOI 10.1002/9781394307340.ch12

Enhancing secured device-to-device communication in 5G networks using open5GS and UERANSIM

Book Chapter
Year: 2026. Pages: 419-424 .
Authors: D J Chaithanya; L M Soumya; P K Shashidhar; R K Hanumanth Raju
DOI 10.1201/9781003650201-70

Design and implementation of next generation MIMO systems using zero-forcing precoding algorithm: An evaluation of signal recovery performance

Book Chapter
Year: 2026. Pages: 425-430 .
Authors: D J Chaithanya; Chandrashekar M Patil; Preetham Roshan; M Sahana; G N Shwetharani; A R Abhishek
DOI 10.1201/9781003650201-71
Showing 1 to 8 of 46 publications