Prabhu Prasad B M
VIDWAN ID: 207129

Dr Prabhu Prasad B M

Male
Assistant Professor | Department of Computer Science and Engineering
Indian Institute of Information Technology, Dharwad
Expertise: Computer Science Hardware and Architecture
25 Publications
0 Projects
83 Scopus Citations
75 CrossRef
5 Years 5 Months Total Experience
Publications
25 Total
Articles
5
Chapters
1
Proceedings
19
Activity

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Scopus Scopus
83 Citations
6 h-index
CrossRef CrossRef
75 Citations
5 h-index
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Assistant Professor
Apr 2021 – Present
Indian Institute of Information Technology, Dharwad | Department of Computer Science and Engineering
Engineering and Technology
Computer Science Hardware and Architecture

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Scholarly Publications

Integrating Context and Criteria in Hotel Recommendations: A Deep Learning Perspective

Conference Paper
Year: 2024.
Authors: Karan Raaj; Milind Murmu; Shravya N Kanalli; Tanush Korgaokar; Manjunath Vanahalli; Prabhu Prasad; Bam Bahadur Sinha

Cache analysis and software optimizations for faster on-chip network simulations

Conference Paper
Year: 2016. Volume: 2018-January , Pages: 83-88 .
Authors: Khyamling Parane; B.M. Prabhu Prasad; Basavaraj Talawar

Trace-Driven Simulation and Design Space Exploration of Network-on-Chip Topologies on FPGA

Conference Paper
Year: 2018. Pages: 129-134 .
Authors: G S Sangeetha; Vignesh Radhakrishnan; Prabhu Prasad; Khyamling Parane; Basavaraj Talawar

Design of an adaptive and reliable network on chip router architecture using FPGA

Conference Paper
Year: 2019.
Authors: Khyamling Parane; B. M Prabhu Prasad; Basavaraj Talawar

High-performance NoC simulation acceleration framework employing the xilinx DSP48E1 blocks

Conference Paper
Year: 2019.
Authors: B M Prabhu Prasad; Khyamling Parane; Basavaraj Talawar

YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Supporting Congestion-Aware Adaptive Routing Using FPGAS

Journal Article
Journal of Circuits, Systems and Computers. Year: 2019. Volume: 28 , Issue: 12 .
Authors: Khyamling Parane; B. M. Prabhu Prasad; Basavaraj Talawar

P-NoC: Performance Evaluation and Design Space Exploration of NoCs for Chip Multiprocessor Architecture Using FPGA

Journal Article
Wireless Personal Communications. Year: 2020. Volume: 114 , Issue: 4 , Pages: 3295-3319 .
Authors: Khyamling Parane; B. M. Prabhu Prasad; Basavaraj Talawar

Hy-BTree: An efficient Tree based topology for FPGA based NoC implementation

Conference Paper
Year: 2021.
Authors: B M Prabhu Prasad; Khyamling Parane; Basavaraj Talawar
Showing 1 to 8 of 25 publications