Ministry of Education
Soumen Mallick
VIDWAN ID: 187682

Dr Soumen Mallick

Male Doctor of Philosophy
Assistant Professor | Department of Electrical Engineering
Dr. B. C. Roy Engineering College, Durgapur 120
West Bengal
Expertise: Electrical and Electronic Engineering
ORCID 0000-0003-4287-1085 Scopus 42461977700 ResearcherID ABI-2519-2020 Google Scholar jlp9dTIAAAAJ
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11 Publications
0 Projects
119 Scopus Citations
99 CrossRef
19 Years 8 Months Total Experience
Publications
11 Total
Articles
5
Proceedings
6
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Scopus Scopus
119 Citations
5 h-index
CrossRef CrossRef
99 Citations
5 h-index
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Personal Details

Doctor of Philosophy
2019
SKU College
Master of Technology
2007
National Institute of Cholera and Enteric Diseases
Bachelor of Technology
2004
Karpagam Academy of Higher Education, Coimbatore
Assistant Professor
Jul 2022 – Present
Dr. B. C. Roy Engineering College, Durgapur 120 | Department of Electrical Engineering
Assistant Professor (Grade-II)
Aug 2010 – Jul 2022
Dr. B. C. Roy Engineering College, Durgapur 120 | Department of Electrical Engineering
Lecturer
Jan 2007 – Jul 2010
Bengal Institute of Technology and Management 163
Engineering and Technology
Electrical and Electronic Engineering

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Scholarly Work

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Scholarly Publications

Optimal design of second generation current conveyor using craziness-based particle swarm optimisation

Journal Article
International Journal of Bio-Inspired Computation. Year: 2022. Volume: 19 , Issue: 2 , Pages: 87-96 .
Authors: Soumen Mallick; Rajib Kar; Durbadal Mandal
DOI 10.1504/IJBIC.2022.121234 Crossref Crossref: 5 Scopus Scopus: 5

Automated Design of CMOS-DACML Circuit

Conference Paper
Year: 2024.
Authors: Soumen Mallick; Shibendu Mahata; Saikat Layek; Arinjoy Mitra; Bikram Rajak
DOI 10.1109/IICCCS61609.2024.10763693

A DVCC Based Realization of Optimized Fractional Step Low Pass Filter

Conference Paper
Year: 2024. Pages: 447-452 .
Authors: Shibendu Mahata; Soumen Mallick; Rahul Kumar Tanti; Balaram Halder; Piyush Dutta; Subhajit Hati
DOI 10.1109/ICETEMS64039.2024.10965087

Optimal design of 2.4 GHz CMOS LNA using PSO with aging leader and challenger

Conference Paper
Year: 2019. Volume: 759 , Pages: 291-303 .
Authors: S. Mallick; R. Kar; D. Mandal; Tanya Dasgupta; S. P. Ghoshal
DOI 10.1007/978-981-13-0341-8_27 Scopus Scopus: 2

Sizing of two stage op-Amp using OHS algorithm

Conference Paper
Year: 2017.
Authors: Soumen Mallick; Kumari Suman; Rajib Kar; Durbadal Mandal; Sakti Prasad Ghoshal
DOI 10.1109/IEECON.2017.8075891

Optimal design of 5.5 GHz CMOS Lna using hybrid fitness based adaptive de with PSO

Conference Paper
Year: 2017.
Authors: S. Mallick; J. R. Akhil; A. Dasgupta; Rajib Kar; Durbadal Mandal; Sakti Prasad Ghoshal
DOI 10.1109/IEECON.2017.8075890 Crossref Crossref: 7 Scopus Scopus: 6

Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization

Journal Article
International Journal of Machine Learning and Cybernetics. Year: 2017. Volume: 8 , Issue: 1 , Pages: 309-331 .
Authors: S. Mallick; R. Kar; D. Mandal; S. P. Ghoshal
DOI 10.1007/s13042-014-0324-3 Crossref Crossref: 47 Scopus Scopus: 62

SEOA-based optimal design of analogue CMOS amplifier circuits

Journal Article
International Journal of Bio-Inspired Computation. Year: 2017. Volume: 9 , Issue: 4 , Pages: 211-225 .
Authors: Soumen Mallick; Rajib Kar; Sakti Prasad Ghoshal; Durbadal Mandal
DOI 10.1504/IJBIC.2017.084314 Crossref Crossref: 1 Scopus Scopus: 3
Showing 1 to 8 of 11 publications