Sivani Kosaraju
VIDWAN ID: 179347

Dr Sivani Kosaraju

Female Doctor of Philosophy
Professor | Electronics and Instrumentation Engineering
Kakatiya Institute of Technology and Science
Telangana
Expertise: Instruments and Instrumentation
59 Publications
2 Projects
412 Scopus Citations
311 CrossRef
35 Years 11 Months Total Experience
Publications
59 Total
Articles
23
Books
2
Chapters
1
Proceedings
33
Activity

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Scopus Scopus
412 Citations
12 h-index
CrossRef CrossRef
311 Citations
10 h-index
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Professional Recognition

Distinguished Alumni Teacher Award
2018
Kakatiya Institute of Technology & Science

Community & Membership

Academic Advisory Committee, KITSW
Member
Jan 2016
Academic Council
Member
Jan 2018
ISTE
Member
Jan 1995
IETE
Life Member
Jan 2007
IEEE
Member
Jan 2008

Personal Details

Doctor of Philosophy
2010
N/A
Master of Technology
1988
N/A
Bachelor of Technology
1986
N/A
Professor
Oct 1990 – Present
Kakatiya Institute of Technology and Science | Electronics and Instrumentation Engineering
Engineering and Technology
Instruments and Instrumentation

Related Profiles

Scholarly Work

STTP on VLSI Design: Bridging concepts to practice
Other
Agency: All India Council for Technical Education Role: Other Grant: AICTE order No. 34-65/197/RIFD/STTP/Policy-1/2018-19
Modernization and automation of Process Control Lab
Other
Agency: All India Council for Technical Education Role: Other Grant: AICTE order No. 9-73/RIFD/MOD/Policy-1/2018-19 dated 02.12.2019

Study and Performance Evaluation of Cooperative Wireless Networks Under power Constraints

University JNTUH
Year 2018
Downloads 0

DISTINCT METHODS FOR REDUCTION OF MOTION ARTIFACTS IN PPG SIGNALS

University JNTUH
Year 2020
Downloads 0

Development of a dedicated reconfigurable prototyping system for OFDM channel estimation and secured communication

University JNTUH, Hyderabad
Year 2021
Downloads 0

Modified Parallel Prefix Adder and Applications

University VFSTR University
Year 2021
Downloads 0

Development and implementation of efficient WCDMA RAKE receiver for spread spectrum based channel track

University JNTUH, Hyderabad
Year 2021
Downloads 0

Performance Improvement of Digital VLSI Decoders, Multiplexers and their applications

University Kakatiya University, Warangal
Year 2022
Downloads 0

Low-power design of Digital Circuits using Dual Gate Tunnel FET

University JNTU HYDERABAD
Year 2025
Downloads 0

MODIFIED HIGH PERFORMANCE PIPELINED PARALLEL PREFIX BRENT KUNG ADDER

Intellectual Property India
- Application No. : 202141040425 Filed : 06-09-2021
Published : 17-09-2021 Filed

Scholarly Publications

Performance analysis of dual hop relaying systems

Journal Article
Year: 2015. Volume: 10 , Issue: 20 , Pages: 18230-18234 .

Performance Index of the Outage Probability for Two-Relay Decode and Forward Cooperative Communications

Book Chapter
Year: 2016. Volume: 3 , Pages: 35-54 .
Authors: Swapna Thouti; K. Sivani; K. Kishan Rao

An Attention-Enhanced U-Net Model for Precise Liver Tumor Segmentation Using Convolutional Block Attention and Efficient Neural Network: Advancing Automated Imaging for Improved Liver Tumor Diagnosis

Open Access
Journal Article
International Journal of Electronics and Communication Engineering. Year: 2025. Volume: 12 , Issue: 12 , Pages: 44-59 .
Authors: Shashikanth B; Sivani K

Ultra Low Power and High Speed Electronic Circuits Using Double Gate Tunnel Field Effect Transistor

Journal Article
Journal of The Institution of Engineers (India): Series B. Year: 2025. Volume: 106 , Issue: 2 , Pages: 713-733 .
Authors: Ch. Pavan Kumar; K. Sivani

An efficient single-stage carry select adder using excess-1 FinFET circuit in 22 nm technology

Journal Article
Semiconductor Science & Technology. Year: 2024. Volume: 39 , Issue: 9 .
Authors: Jeevan Battini; Sivani Kosaraju

Design of a Double Gate Tunneling Field Effect Transistor (DG-TFET) and Performance Analysis

Open Access
Journal Article
Journal of Integrated Circuits and Systems. Year: 2024. Volume: 19 , Issue: 2 .
Authors: Chinnala Pavan Kumar; K Sivani

Design of 2-1 Multiplexer based high-speed, Two-Stage 90 nm Carry Select Adder for fast arithmetic units

Journal Article
Microprocessors and Microsystems. Year: 2023. Volume: 99 .
Authors: B. Jeevan; K. Bikshalu; E. Hari krishna; K. Sivani

A new 18nm FinFET-based Programmable Logic Array type Multiplexer for High-speed and Low-Power applications

Conference Paper
Year: 2023. Pages: 1205-1210 .
Authors: B. Jeevan; K. Sivani
Showing 1 to 8 of 59 publications