Rohith Bala Jaswanth B
VIDWAN ID: 176222

Mr Rohith Bala Jaswanth B

Male Doctor of Philosophy
Associate Professor
Seshadri Rao Gudlavalleru Engineering College
Andhra Pradesh
Expertise: Electrical and Electronic Engineering
27 Publications
1 Projects
14 Scopus Citations
5 CrossRef
13 Years 4 Months Total Experience
Publications
27 Total
Articles
22
Chapters
1
Proceedings
4
Activity

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Scopus Scopus
14 Citations
3 h-index
CrossRef CrossRef
5 Citations
1 h-index
Google Scholar Google Scholar

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Professional Recognition

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Community & Membership

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IE
Regular
Jan 2014

Personal Details

Doctor of Philosophy
2023
N/A
Master of Technology
2011
N/A
Bachelor of Engineering
2008
N/A
Associate Professor
May 2013 – Present
Seshadri Rao Gudlavalleru Engineering College
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

Design of Operational Transconductance Amplifier for ECG Applications using CMOS Technology(OTA
Other
Agency: All India Council for Technical Education Role: Co-Principal Investigator
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Internet of Things and Artificial Intelligence based Grain Cleaning and Sorting with Machine Vision.

Rohith Bala Jaswanth B
- Application No. : 202241051830 A Filed : 11-09-2022
Published : 23-09-2022 Published

IOT based smart home model for assisting elderly people

Indian Patent
- Application No. : 202211037454 Filed : 01-01-2022
Published : 08-07-2022 Filed

Design of Low power Operational Transconductance Amplifier and filter for ECG applications

Rohith Bala Jaswanth B
- Application No. : 202141006907 Filed : 18-02-2021
Published : 26-02-2021 Published

Intelligent Accident Avoidance using Satellite Based Positioning System

Gudlavalleru Engineering College
- Application No. : 202041028920 Filed : 07-07-2020
Published : 31-07-2020 Published

Scholarly Publications

A Design of Low Power Delay Buffer

Journal Article
Year: 2013.

Implementation of Modern Vigilance Control Device using GSM & GPS Technology

Journal Article
Year: 2013.

Designing of a Low Cost Based Alerting System to Prevent Train Accidents Using GSM & GPS Technology

Journal Article
Year: 2013.

Crack Sensing Scheme in Rail Tracking System

Journal Article
Year: 2014.

Design and Analysis of High Performance FIR Filter using MAC Unit

Journal Article
Year: 2014.

Implementation of high Security NFC Tag on FPGA

Journal Article
Year: 2015.

Design and analysis of CNFET based 2:1 MUX in NANO scale region

Journal Article
Year: 2017.
Authors: Devi Supraja, C.; Vijaya Babu, E.; Rohith Bala Jaswanth, B.; Nalajala, P.; Godavarthi, B.

Performance Evaluation of Adaptive Hold Logic Based Algorithmic Implementation in Multipliers

Journal Article
Year: 2017.
Showing 9 to 16 of 27 publications