Kalavathi Devi T
VIDWAN ID: 170946

Dr Kalavathi Devi T

Female Doctor of Philosophy
Associate Professor | Department of Electronics and Instrumentation Engineering
Kongu Engineering College
Tamil Nadu
Expertise: Electrical and Electronic Engineering
43 Publications
0 Projects
139 Scopus Citations
152 CrossRef
22 Years 3 Months Total Experience
Publications
43 Total
Articles
33
Books
1
Chapters
3
Proceedings
6
Activity

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Scopus Scopus
139 Citations
6 h-index
CrossRef CrossRef
152 Citations
6 h-index
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Professional Recognition

Certificate of Achievement for guiding the Best M.Tech Thesis
2008
ISTE
Second Prize for the paper presentation
2000
Karunya Institute of Technology
Best Faculty Award
2012
KVITT
Best Project Award
2012
KVITT
Best paper Award
2014
Bannari Amman Institute of Technology, Sathy
Project Mentor
2015
Texas Instruments
Project –Best Project
2016
KEC-OHE
Best Researcher Award
2018
ASDF

Community & Membership

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IJCSIT
Life Member
Jan 2013

Personal Details

Doctor of Philosophy
2013
N/A
Associate Professor
Jun 2004 – Present
Kongu Engineering College | Department of Electronics and Instrumentation Engineering
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

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MULTIFUNCTIONAL CART FOR HEALTH MONITORING AND MOVEMENT OF PATIENT

Kongu Engineering College
- Application No. : 202011004563 A Filed : 02-02-2020
Published : 14-02-2020 Published

Scholarly Publications

High Performance and Low Power VLSI Architecture of Viterbi Decoder using Asynchronous QDI Techniques

Journal Article
Year: 2009.

Wave Pipelined VLSI Architecture for a Viterbi Decoder Using Self Reset Logic with 0.65 nm Technology

Journal Article

Gate diffusion input (GDI) circuits based low power VLSI architecture for a Viterbi decoder

Journal Article
Year: 2011.
Authors: Kalavathidevi, T.; Venkatesh, C.

Area efficient low power VLSI architecture for a viterbi decoder using Gate diffusion input (GDI) logic style

Journal Article
Year: 2011.
Authors: Kalavathidevi, T.; Venkatesh, C.

An efficient low power VLSI Architecture for a Viterbi Decoder using Null Convention Logic

Journal Article
Year: 2011.

LOW POWER VLSI ARCHITECTURE OF A VITERBI DECODER USING ASYNCHRONOUS PRECHARGE HALF BUFFER DUAL RAILTECHNIQUES.

Journal Article
Year: 2012.

Design of PID Controller For Boiler Drum Level Control

Journal Article
Year: 2013.

Characteristic Recognition of copra using Image processing.

Journal Article
Year: 2015.
Showing 1 to 8 of 43 publications