Vidwan | Profile

VIDWAN ID: 1680

Dr Anindya S Dhar

Male Doctor of Philosophy

Professor | Department of Electronics and Electrical Communication Engineering

Indian Institute of Technology, Kharagpur

West Bengal

Expertise: Electrical and Electronic Engineering

56206679100

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139 Publications

0 Projects

990 Scopus Citations

785 CrossRef

30 Years Total Experience

Publications

139 Total

Articles

Chapters

Proceedings

Activity

Scopus

990 Citations

14 h-index

CrossRef

785 Citations

13 h-index

Google Scholar

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Professional Recognition

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Community & Membership

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Personal Details

Doctor of Philosophy

N/A

Professor

Sep 1996 – Present

Indian Institute of Technology, Kharagpur | Department of Electronics and Electrical Communication Engineering

Engineering and Technology

Electrical and Electronic Engineering

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Organisations (814+)

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Mr Vinay Jirgale Research Scholar

Dr Samir Kumar Jalal Deputy Librarian

Prof Virendra Kumar Tiwari Director

Dr Soumava Mukherjee Associate Professor

Dr Debashis Mandal Assistant Professor

Dr Jitesh Thakkar Associate Professor

Prof Nabakumar Jana Assistant Professor (Grade-I)

Prof Gangumala Srinivas Rao Associate Professor

Prof Abhijit Bhattacharya Professor

Prof Anindya Sarkar Professor

Co-Authors (16)

Dr Debasish Datta N/A

Dr Mrityunjoy Chakraborty Indian Institute of Technology, Kharagpur

Dr Atin Mukherjee National Institute of Technology, Rourkela

Dr Ayan Banerjee INDIAN INSTITUTE OF ENGINEERING SCIENCE AND TECHNOLOGY, SHIBPUR

Dr Subrahmanyam Mula Indian Institute of Technology, Palakkad

Dr Kailash chandra Ray Indian Institute of Technology, Patna

Dr Rakesh Biswas Indian Institute of Information Technology, Guwahati

Dr Tanmai Kulshreshtha PRANVEER SINGH INSTITUTE OF TECHNOLOGY, KANPUR

Dr Debasis Samanta Indian Institute of Technology, Kharagpur

Prof Indrajit Chakrabarti Indian Institute of Technology, Kharagpur

Prof Santanu Chattopadhyay Indian Institute of Technology, Kharagpur

Dr Monalisa Sarma Indian Institute of Technology, Kharagpur

Prof Rajarshi Mahapatra N/A

Dr Ayan Palchaudhuri Dhirubhai Ambani University

Dr B Vandana K.G Reddy College of Engineering and Technology

Dr Ayan Palchaudhuri Indian Institute of Technology, Bhubaneshwar

Scholarly Work

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ONBOARD OPERATIONAL COMPRESSION SYSTEM FOR SPACE APPLICATIONS

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR | INDIAN SPACE RESEARCH ORGANISATION

- Patent No. : IN201831000646A Filed : 05-01-2018

Published : 12-07-2019 Published

AN ULTRA LOW POWER TRANSMITTER FOR BIOMEDICAL WIRELESS SENSOR NODES INCLUDING MICS BAND APPLICATIONS

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR

- Patent No. : IN201500788I2 Filed : 20-07-2015

Published : 01-12-2017 Published

SYSTEM FOR MOTION ESTIMATION IN VIDEO SIGNALS FOR REAL TIME VIDEO PROCESSING

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR

- Patent No. : IN201400859I2 Filed : 20-08-2014

Published : 26-08-2016 Published

SYSTEM AND METHOD FOR FREQUENCY CALIBRATION OF OSCILLATORS INVOLVING FRACTION PHASE.

INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR

- Patent No. : IN201300951I2 Filed : 13-08-2013

Published : 20-02-2015 Published

Scholarly Publications

Array architecture for computing discrete Fourier transform to assist semiconductor device modelling

Journal Article

Electronics Letters. Year: 1992. Volume: 28 , Issue: 7 , Pages: 697-698 .

Authors: A.S. Dhar; S. Banerjee

10.1049/el:19920440

Crossref: 2

Scopus: 1

An array architecture for computing two-dimensional discrete Hartley transforms

Journal Article

Computers & Electrical Engineering. Year: 1991. Volume: 17 , Issue: 1 , Pages: 23-29 .

Authors: Anindya Sundar Dhar; Swapna Banerjee

10.1016/0045-7906(91)90020-Z

Crossref: 3

Scopus: 4

An Array Architecture for Fast Computation of Discrete Hartley Transform

Journal Article

IEEE Transactions on Circuits and Systems. Year: 1991. Volume: 38 , Issue: 9 , Pages: 1095-1098 .

Authors: A.S. Dhar; S. Banerjee

10.1109/31.83883

Crossref: 47

Scopus: 47

Analog sampled data architecture for discrete cosine transform

Conference Paper

Year: 2003. Volume: 1 , Pages: 502-505 .

Authors: Mal; Dhar

10.1109/ICASIC.2003.1277596

Crossref: 4

Scopus: 2

Switched capacitor architecture for prime length discrete Hartley transform

Conference Paper

Year: 2003. Pages: 505-508 .

Authors: A.K. Mal; A.S. Dhar

10.1109/EDSSC.2003.1283582

Crossref: 2

Scopus: 2

VLSI architecture for multi-resolution three step search algorithm

Conference Paper

Year: 2003. Volume: 2 , Pages: 918-921 .

Authors: Sarma; Samanta; Sundar Dhar

10.1109/ICASIC.2003.1277360

Crossref: 7

Scopus: 12

A VLSI array architecture for realization of DFT, DHT, DCT and DST

Journal Article

Signal Processing. Year: 2001. Volume: 81 , Issue: 9 , Pages: 1813-1822 .

Authors: K. Maharatna; A.S. Dhar; Swapna Banerjee

10.1016/S0165-1684(01)00061-5

Crossref: 41

Scopus: 48

FPGA realization of a CORDIC based FFT processor for biomedical signal processing

Journal Article

Microprocessors and Microsystems. Year: 2001. Volume: 25 , Issue: 3 , Pages: 131-142 .

Authors: Ayan Banerjee; Anindya Sundar Dhar; Swapna Banerjee

10.1016/S0141-9331(01)00106-5

Crossref: 47

Scopus: 61

Showing 1 to 8 of 139 publications