Authors: G. S. Dhanush; Devadri Bhattacharya; J. M. Adithya; G. Kushal; M. R. Shrisha
Near Memory Computation on Basys3FPGA
Conference Paper
Year: 2024.
Authors: AnanyaS.Bhat; Shrisha M R; Anushree J; Imran S; K NandanSrinivaas
FPGA based Ultrasonic thickness measuring device
Conference Paper
Year: 2018.
Pages: 779-784
.
Authors: Shrisha, M.R.; Chakraborty, N.; Mahapatra, D.R.; Sunkara, S.
Skew Reduction Technique Using the Clock Mesh Analysis in DDR IP Structural Design Development for Server ProductsSkew Reduction Technique Using the Clock Mesh Analysis in DDR IP Structural Design Development for Server Products
Other
Year: 2020.
A Review On Comparative Analysis Of 16-Bit And 32-Bit RISC Pipelined Processors By Verilog Design
Journal Article
Year: 2024.
Authors: SHRISHA M R
Machine Learning Based Parkinson’s Disease Detection Using Voice and Handwriting Analysis
Book Chapter
Year: 2024.
Pages: 171-186
.
Authors: Sauransh Singh; Ruchir Kumar Kadwey; Shrey Srivatsava; Shikhar Singh; M. R. Shrisha
Machine Learning Based Parkinson’s Disease Detection Using Voice and Handwriting Analysis
Book Chapter
Year: 2024.
Authors: SHRISHA M R
Comparative Analysis of 16-bit and 32-bit RISC Pipelined Processors by Verilog Design