Subodh Kumar Singhal
VIDWAN ID: 139282

Dr Subodh Kumar Singhal

Male Doctor of Philosophy
Assistant Professor | Department of Electronics and Communication Engineering
Jaypee University of Engineering & Technology, Guna
Madhya Pradesh
Expertise: Electrical and Electronic Engineering
12 Publications
0 Projects
105 Scopus Citations
85 CrossRef
19 Years 10 Months Total Experience
Publications
12 Total
Articles
8
Proceedings
4
Activity

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Scopus Scopus
105 Citations
5 h-index
CrossRef CrossRef
85 Citations
5 h-index
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Professional Recognition

Session Chair in the international Conference
2021
Aadiya college of Engineering and Technology

Community & Membership

IEEE
Reviewer
Jan 2012
CSSP springer
Reviewer
Jan 2012
JCSC
Reviewer
Jan 2016
IETE
Fellow Member
Jan 2024

Personal Details

Doctor of Philosophy
2017
Haryana State Pollution Control Board
Master of Technology
2006
CENTRE FOR ADVANCED EDUCATION INSTITUTE OF MANAGEMENT TECHNOLOGY
Bachelor of Engineering
2004
Homi Bhabha National Institute, Mumbai
Assistant Professor
Mar 2007 – Present
Jaypee University of Engineering & Technology, Guna | Department of Electronics and Communication Engineering
Research Engineer
Nov 2006 – Mar 2007
Maulana Azad National Institute of Technology, Bhopal | Department of Electronics and Communication Engineering
Engineering and Technology
Electrical and Electronic Engineering

Related Profiles

Scholarly Work

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Scholarly Publications

Performance analysis of single image fog expulsion techniques

Conference Paper
Year: 2021. Pages: 182-187 .
Authors: Saxena, G.; Bhadauria, S.S.; Singhal, S.K.

A Phase Modulation-Based Approach for Theft-Proof Electricity Distribution in India Using CDMA Technology

Open Access
Journal Article
Journal Europeen des Systemes Automatises. Year: 2024. Volume: 57 , Issue: 6 .
Authors: Saxena, G.; Singhal, S.K.; Bhosale, S.; Pandey, P.

Area-delay efficient Radix-4 8×8 Booth multiplier for DSP applications

Open Access
Journal Article
TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES. Year: 2021. Volume: 29 , Issue: 4 , Pages: 2012-2028 .
Authors: Singhal, S.K.; Patel, S.K.; Mahajan, A.; Saxena, G.

Efficient Diminished-1 Modulo (2n+1) Adder Using Parallel Prefix Adder

Journal Article
Journal of Circuits, Systems and Computers. Year: 2020. Volume: 29 , Issue: 12 , Pages: 2050186 .
Authors: Subodh Kumar Singhal; B. K. Mohanty; Sujit Kumar Patel; Gaurav Saxena

An area-delay efficient single-precision floating-point multiplier for VLSI systems

Journal Article
Microprocessors and Microsystems. Year: 2023. Volume: 98 , Pages: 104798 .
Authors: Anuradha; Sujit Kumar Patel; Subodh Kumar Singhal

Area-delay and energy efficient multi-operand binary tree adder

Journal Article
IET Circuits, Devices & Systems. Year: 2020. Volume: 14 , Issue: 5 , Pages: 586-593 .
Authors: Patel, S.K.; Singhal, S.K.

A high-performance VLSI architecture for reconfigurable FIR using distributed arithmetic

Journal Article
Integration, the VLSI Journal. Year: 2016. Volume: 54 , Pages: 37-46 .
Authors: Mohanty, B.K.; Meher, P.K.; Singhal, S.K.; Swamy, M.N.S.

Area-Delay and Energy-Efficient Throughput-Scalable VLSI Architecture for SDR Channelizer

Journal Article
Circuits, Systems, and Signal Processing. Year: 2016. Volume: 35 , Issue: 8 , Pages: 2958-2971 .
Authors: Mohanty, B.K.; Singhal, S.K.
Showing 1 to 8 of 12 publications