Jatindra Kumar Deka
VIDWAN ID: 11916

Prof Jatindra Kumar Deka

Male Doctor of Philosophy
Professor | Department of Computer Science and Engineering
Indian Institute of Technology, Guwahati
Assam
Expertise: Computer Science Information Systems
64 Publications
0 Projects
475 Scopus Citations
381 CrossRef
36 Years 10 Months Total Experience
Publications
64 Total
Articles
12
Proceedings
52
Activity

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Scopus Scopus
475 Citations
11 h-index
CrossRef CrossRef
381 Citations
10 h-index
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Professional Recognition

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Community & Membership

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IEEE
Regular
Jan 1999

Personal Details

Doctor of Philosophy
2000
N/A
Master of Technology
1993
N/A
Bachelor of Engineering
1988
N/A
Professor
Jul 2001 – Present
Indian Institute of Technology, Guwahati | Department of Computer Science and Engineering
Assistant Professor
Nov 1989 – Jul 2001
Jorhat Engineering College P.O. Jorhat-785007
Engineering and Technology
Computer Science Information Systems

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Scholarly Work

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VLSI Testing of System on Chip : Incomplete Testing

University Indian Institute of Technology Guwahati
Year 2024
Downloads 50

Design and Testing of Digital VLSI Circuits using Approximate Computing

University Indian Institute of Technology Guwahati
Year 2023
Downloads 137

Test pattern generation and fault localization for some fault models in reversible circuits

University Indian Institute of Technology Guwahati
Year 2019
Downloads 74

Performance-aware test-time optimization schemes for analysis of logic level faults in channels of on-chip networks

University Indian Institute of Technology Guwahati
Year 2018
Downloads 51

Data Pruning Based Outlier Detection

University Indian Institute of Technology Guwahati
Year 2015
Downloads 142
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Scholarly Publications

Abstractions for model checking of event timings

Conference Paper
Year: 2001. Volume: 5 , Pages: 125-128 .

Reasoning about extremal properties of events

Conference Paper
Year: 2003. Volume: 2003-January , Pages: 26-36 .
Authors: J.K. Deka

Organizing UML class diagrams in layers

Conference Paper
Year: 2005. Volume: 2005 , Pages: 39-55 .
Authors: V. Kumar; J.K. Deka

Variable ordering of BDDs using genetic algorithm

Conference Paper
Year: 2005. Pages: 198-208 .

Formally verifying the distributed shared memory weak consistency models

Conference Paper
Year: 2006. Pages: 455-460 .
Authors: Venkateswarlu Chennareddy; Jatindra Kumar Deka

Min-max event-triggered computation tree logic

Journal Article
Year: 2002. Volume: 27 , Issue: PART 2 , Pages: 163-180 .
Authors: Pallab Dasgupta; P. P. Chakrabarti; Jatindra Kumar Deka

Min-max computation tree logic

Open Access
Journal Article
Artificial Intelligence. Year: 2001. Volume: 127 , Issue: 1 , Pages: 137-162 .
Authors: Pallab Dasgupta; P.P. Chakrabarti; Jatindra Kumar Deka; Sriram Sankaranarayanan

Model checking on timed-event structures

Journal Article
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Year: 2000. Volume: 19 , Issue: 5 , Pages: 601-611 .
Authors: P. Dasgupta; J.K. Deka; P.P. Chakrabarti
Showing 1 to 8 of 64 publications